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riscv-gcc-1
Commit 8c5c99dc by Maxim Kuvyrkov Committed by Kazu Hirata
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m68k-devices.def (51qe): New device. 

	* config/m68k/m68k-devices.def (51qe): New device.
	* config/m68k/m68k.c (FL_FOR_isa_c): Remove division unit.  Add it
	to all uses of FL_FOR_isa_c for compatibility.
	(all_microarchs): Add cfv1 microarchitecture.
	(m68k_handle_option): Handle m51qe option.
	* config/m68k/m68k.h (TARGET_CPU_CPP_BUILTINS): Handle 51QE.
	(TUNE_CFV1): New macro.
	(enum uarch_type): Add ucfv1.
	* doc/invoke.texi: Document 51qe device and cfv1 microarchitecture.

From-SVN: r128574
parent efe9e829
Showing with 33 additions and 9 deletions
gcc/ChangeLog
2007-09-18 Maxim Kuvyrkov <maxim@codesourcery.com>
* config/m68k/m68k-devices.def (51qe): New device.
* config/m68k/m68k.c (FL_FOR_isa_c): Remove division unit. Add it
to all uses of FL_FOR_isa_c for compatibility.
(all_microarchs): Add cfv1 microarchitecture.
(m68k_handle_option): Handle m51qe option.
* config/m68k/m68k.h (TARGET_CPU_CPP_BUILTINS): Handle 51QE.
(TUNE_CFV1): New macro.
(enum uarch_type): Add ucfv1.
* doc/invoke.texi: Document 51qe device and cfv1 microarchitecture.
2007-09-18 Richard Guenther <rguenther@suse.de>
PR tree-optimization/31863
gcc/config/m68k/m68k-devices.def
......@@ -76,6 +76,9 @@ M68K_DEVICE ("68302", m68302, "68302", "68000", 68000, isa_00, FL_MMU)
M68K_DEVICE ("68332", m68332, "68332", "cpu32", cpu32, isa_cpu32, FL_MMU)
M68K_DEVICE ("cpu32", cpu32, "cpu32", "cpu32", cpu32, isa_cpu32, FL_MMU)
/* ColdFire CFV1 processor. */
M68K_DEVICE ("51qe", mcf51qe, "51qe", "51qe", cfv1, isa_c, FL_CF_USP)
/* ColdFire CFV2 processors. */
M68K_DEVICE ("5202", mcf5202, "5206", "5206", cfv2, isa_a, 0)
M68K_DEVICE ("5204", mcf5204, "5206", "5206", cfv2, isa_a, 0)
......@@ -130,12 +133,12 @@ M68K_DEVICE ("537x", mcf537x, "5373", "5329", cfv3, isa_aplus, FL_CF_HWD
/* CFV4/CFV4e processors. */
M68K_DEVICE ("5407", mcf5407, "5407", "5407", cfv4, isa_b, FL_CF_MAC)
M68K_DEVICE ("54450", mcf54450, "54455", "54455", cfv4, isa_c, FL_CF_USP | FL_CF_EMAC | FL_MMU)
M68K_DEVICE ("54451", mcf54451, "54455", "54455", cfv4, isa_c, FL_CF_USP | FL_CF_EMAC | FL_MMU)
M68K_DEVICE ("54452", mcf54452, "54455", "54455", cfv4, isa_c, FL_CF_USP | FL_CF_EMAC | FL_MMU)
M68K_DEVICE ("54453", mcf54453, "54455", "54455", cfv4, isa_c, FL_CF_USP | FL_CF_EMAC | FL_MMU)
M68K_DEVICE ("54454", mcf54454, "54455", "54455", cfv4, isa_c, FL_CF_USP | FL_CF_EMAC | FL_MMU)
M68K_DEVICE ("54455", mcf54455, "54455", "54455", cfv4, isa_c, FL_CF_USP | FL_CF_EMAC | FL_MMU)
M68K_DEVICE ("54450", mcf54450, "54455", "54455", cfv4, isa_c, FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU)
M68K_DEVICE ("54451", mcf54451, "54455", "54455", cfv4, isa_c, FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU)
M68K_DEVICE ("54452", mcf54452, "54455", "54455", cfv4, isa_c, FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU)
M68K_DEVICE ("54453", mcf54453, "54455", "54455", cfv4, isa_c, FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU)
M68K_DEVICE ("54454", mcf54454, "54455", "54455", cfv4, isa_c, FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU)
M68K_DEVICE ("54455", mcf54455, "54455", "54455", cfv4, isa_c, FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU)
M68K_DEVICE ("5470", mcf5470, "5475", "5475", cfv4e, isa_b, FL_CF_USP | FL_CF_EMAC | FL_CF_FPU | FL_MMU)
M68K_DEVICE ("5471", mcf5471, "5475", "5475", cfv4e, isa_b, FL_CF_USP | FL_CF_EMAC | FL_CF_FPU | FL_MMU)
M68K_DEVICE ("5472", mcf5472, "5475", "5475", cfv4e, isa_b, FL_CF_USP | FL_CF_EMAC | FL_CF_FPU | FL_MMU)
......
gcc/config/m68k/m68k.c
......@@ -239,7 +239,7 @@ struct gcc_target targetm = TARGET_INITIALIZER;
/* Note ISA_B doesn't necessarily include USP (user stack pointer) support. */
#define FL_FOR_isa_b (FL_FOR_isa_a | FL_ISA_B | FL_CF_HWDIV)
/* ISA_C is not upwardly compatible with ISA_B. */
#define FL_FOR_isa_c (FL_FOR_isa_a | FL_ISA_C | FL_CF_HWDIV | FL_CF_USP)
#define FL_FOR_isa_c (FL_FOR_isa_a | FL_ISA_C | FL_CF_USP)
enum m68k_isa
{
......@@ -302,7 +302,8 @@ static const struct m68k_target_selection all_isas[] =
{ "isaaplus", mcf5271, NULL, ucfv2, isa_aplus, (FL_FOR_isa_aplus
| FL_CF_HWDIV) },
{ "isab", mcf5407, NULL, ucfv4, isa_b, FL_FOR_isa_b },
{ "isac", unk_device, NULL, ucfv4, isa_c, FL_FOR_isa_c },
{ "isac", unk_device, NULL, ucfv4, isa_c, (FL_FOR_isa_c
| FL_CF_HWDIV) },
{ NULL, unk_device, NULL, unk_arch, isa_max, 0 }
};
......@@ -319,6 +320,7 @@ static const struct m68k_target_selection all_microarchs[] =
{ "68040", m68040, NULL, u68040, isa_40, FL_FOR_isa_40 },
{ "68060", m68060, NULL, u68060, isa_40, FL_FOR_isa_40 },
{ "cpu32", cpu32, NULL, ucpu32, isa_20, FL_FOR_isa_cpu32 },
{ "cfv1", mcf51qe, NULL, ucfv1, isa_c, FL_FOR_isa_c },
{ "cfv2", mcf5206, NULL, ucfv2, isa_a, FL_FOR_isa_a },
{ "cfv3", mcf5307, NULL, ucfv3, isa_a, (FL_FOR_isa_a
| FL_CF_HWDIV) },
......
gcc/config/m68k/m68k.h
......@@ -108,6 +108,10 @@ along with GCC; see the file COPYING3. If not see
builtin_define_std ("mc68020"); \
break; \
\
case ucfv1: \
builtin_define ("__mcfv1__"); \
break; \
\
case ucfv2: \
builtin_define ("__mcfv2__"); \
break; \
......@@ -260,6 +264,7 @@ along with GCC; see the file COPYING3. If not see
#define TUNE_68060 (m68k_tune == u68060 || m68k_tune == u68020_60)
#define TUNE_68040_60 (TUNE_68040 || TUNE_68060)
#define TUNE_CPU32 (m68k_tune == ucpu32)
#define TUNE_CFV1 (m68k_tune == ucfv1)
#define TUNE_CFV2 (m68k_tune == ucfv2)
#define OVERRIDE_OPTIONS override_options()
......@@ -1084,6 +1089,7 @@ enum uarch_type
u68040,
u68060,
ucpu32,
ucfv1,
ucfv2,
ucfv3,
ucfv4,
......
gcc/doc/invoke.texi
......@@ -11096,6 +11096,7 @@ below, which also classifies the CPUs into families:
@multitable @columnfractions 0.20 0.80
@item @strong{Family} @tab @strong{@samp{-mcpu} arguments}
@item @samp{51qe} @tab @samp{51qe}
@item @samp{5206} @tab @samp{5202} @samp{5204} @samp{5206}
@item @samp{5206e} @tab @samp{5206e}
@item @samp{5208} @tab @samp{5207} @samp{5208}
......@@ -11133,7 +11134,7 @@ constraints set by @option{-march} and @option{-mcpu}.
The M680x0 microarchitectures are: @samp{68000}, @samp{68010},
@samp{68020}, @samp{68030}, @samp{68040}, @samp{68060}
and @samp{cpu32}. The ColdFire microarchitectures
are: @samp{cfv2}, @samp{cfv3}, @samp{cfv4} and @samp{cfv4e}.
are: @samp{cfv1}, @samp{cfv2}, @samp{cfv3}, @samp{cfv4} and @samp{cfv4e}.
You can also use @option{-mtune=68020-40} for code that needs
to run relatively well on 68020, 68030 and 68040 targets.
......
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