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Commit 8c40b097 by Ulrich Weigand Committed by Ulrich Weigand
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* config/s390/s390.md: Remove old-style peepholes. 

From-SVN: r58531
parent 522ec94e
Showing with 4 additions and 146 deletions
gcc/ChangeLog
2002-10-25 Ulrich Weigand <uweigand@de.ibm.com>
* config/s390/s390.md: Remove old-style peepholes.
2002-10-25 Ulrich Weigand <uweigand@de.ibm.com>
* config/s390/s390.c (s390_decompose_address): Do not range check the
displacement if base or index is the argument pointer register.
......
gcc/config/s390/s390.md
......@@ -6828,149 +6828,3 @@
(set_attr "length" "6")
(set_attr "type" "integer")])
;;
;; Peephole optimization patterns.
;;
(define_peephole
[(set (match_operand:SI 0 "memory_operand" "m")
(match_operand:SI 1 "register_operand" "d"))
(set (match_dup 1)
(match_dup 0))]
""
"st\\t%1,%0")
(define_peephole
[(set (match_operand:SI 0 "memory_operand" "m")
(match_operand:SI 1 "register_operand" "d"))
(set (match_dup 0)
(match_dup 1))]
""
"st\\t%1,%0")
(define_peephole
[(set (match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "register_operand" ""))
(parallel
[(set (match_dup 0)
(plus:SI (match_dup 0)
(match_operand:SI 2 "immediate_operand" "")))
(clobber (reg:CC 33))])]
"(REGNO (operands[0]) == STACK_POINTER_REGNUM ||
REGNO (operands[1]) == STACK_POINTER_REGNUM ||
REGNO (operands[0]) == BASE_REGISTER ||
REGNO (operands[1]) == BASE_REGISTER) &&
INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 4096"
"la\\t%0,%c2(%1)")
;
; peepholes for fast char instructions
;
;(define_peephole
; [(set (match_operand:QI 0 "register_operand" "d")
; (match_operand:QI 1 "s_operand" "Q"))
; (set (match_operand:SI 2 "register_operand" "0")
; (zero_extend:SI (match_dup 0)))]
; "REGNO(operands[0]) == REGNO(operands[2])"
; "icm\\t%0,8,%1\;srl\\t%0,24")
;(define_peephole
; [(set (match_operand:QI 0 "register_operand" "d")
; (match_operand:QI 1 "s_operand" "Q"))
; (set (match_operand:SI 2 "register_operand" "0")
; (sign_extend:SI (match_dup 0)))]
; "REGNO(operands[0]) == REGNO(operands[2])"
; "icm\\t%0,8,%1\;sra\\t%0,24")
(define_peephole
[(set (match_operand:QI 0 "register_operand" "d")
(match_operand:QI 1 "immediate_operand" "J"))
(set (match_operand:SI 2 "register_operand" "0" )
(sign_extend:SI (match_dup 0) ) )]
"REGNO(operands[0]) == REGNO(operands[2])"
"lhi\\t%0,%h1")
;
; peepholes for fast short instructions
;
;(define_peephole
; [(set (match_operand:HI 0 "register_operand" "d")
; (match_operand:HI 1 "s_operand" "Q"))
; (set (match_operand:SI 2 "register_operand" "0" )
; (zero_extend:SI (match_dup 0)))]
; "REGNO(operands[0]) == REGNO(operands[2])"
; "icm\\t%0,12,%1\;srl\\t%0,16")
(define_peephole
[(set (match_operand:HI 0 "register_operand" "d")
(match_operand:HI 1 "memory_operand" "m"))
(set (match_operand:SI 2 "register_operand" "0" )
(sign_extend:SI (match_dup 0)))]
"REGNO(operands[0]) == REGNO(operands[2])"
"lh\\t%0,%1")
(define_peephole
[(set (match_operand:HI 0 "register_operand" "d")
(match_operand:HI 1 "immediate_operand" "K"))
(set (match_operand:SI 2 "register_operand" "0" )
(sign_extend:SI (match_dup 0) ) )]
"REGNO(operands[0]) == REGNO(operands[2])"
"lhi\\t%0,%h1")
;
; peepholes for divide instructions
;
(define_peephole
[(set (match_operand:DI 0 "register_operand" "d")
(match_operand:DI 1 "memory_operand" "m"))
(set (match_dup 0)
(lshiftrt:DI (match_dup 0)
(match_operand:SI 2 "immediate_operand" "J")))
(set (match_dup 0)
(div:SI (match_dup 0)
(match_operand:SI 3 "nonimmediate_operand" "g")))
(set (match_dup 1)
(match_dup 0))]
""
"*
{
output_asm_insn (\"l\\t%0,%1\", operands);
output_asm_insn (\"srdl\\t%0,%b2\", operands);
if (REG_P (operands[3]))
output_asm_insn (\"dr\\t%0,%3\", operands);
else
output_asm_insn (\"d\\t%0,%3\", operands);
return \"st\\t%N0,%N1\";
}")
(define_peephole
[(set (match_operand:DI 0 "register_operand" "d")
(match_operand:DI 1 "memory_operand" "m"))
(set (match_dup 0)
(lshiftrt:DI (match_dup 0)
(match_operand:SI 2 "immediate_operand" "J")))
(set (match_dup 0)
(mod:SI (match_dup 0)
(match_operand:SI 3 "nonimmediate_operand" "g")))
(set (match_dup 1)
(match_dup 0))]
""
"*
{
output_asm_insn (\"l\\t%0,%1\", operands);
output_asm_insn (\"srdl\\t%0,%b2\", operands);
if (REG_P (operands[3]))
output_asm_insn (\"dr\\t%0,%3\", operands);
else
output_asm_insn (\"d\\t%0,%3\", operands);
return \"st\\t%0,%1\";
}")
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