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Commit 8ab907e8 by Richard Sandiford Committed by Richard Sandiford
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mips.md (bunge, [...]): New define_expands. 

[gcc/]
	* config/mips/mips.md (bunge, bltgt, bungt): New define_expands.
	(sordered_df, sordered_sf): Remove.
	* config/mips/mips.c (get_float_compare_codes): New fn.
	(gen_int_relational, gen_conditional_move): Use it.

[gcc/testsuite]
	* gcc.c-torture/compile/20020923-1.c: New test.

From-SVN: r57684
parent d12b8c85
Showing with 89 additions and 33 deletions
gcc/ChangeLog
2002-10-01 Richard Sandiford <rsandifo@redhat.com>
* config/mips/mips.md (bunge, bltgt, bungt): New define_expands.
(sordered_df, sordered_sf): Remove.
* config/mips/mips.c (get_float_compare_codes): New fn.
(gen_int_relational, gen_conditional_move): Use it.
2002-10-01 Richard Sandiford <rsandifo@redhat.com>
* config/mips/mips-protos.h (mips_emit_fcc_reload): Declare.
* config/mips/mips.h (PREDICATE_CODES): Add fcc_register_operand.
* config/mips/mips.c (fcc_register_operand): New function.
......
gcc/config/mips/mips.c
......@@ -84,6 +84,8 @@ enum internal_test {
struct constant;
struct mips_arg_info;
static enum internal_test map_test_to_internal_test PARAMS ((enum rtx_code));
static void get_float_compare_codes PARAMS ((enum rtx_code, enum rtx_code *,
enum rtx_code *));
static int mips16_simple_memory_operand PARAMS ((rtx, rtx,
enum machine_mode));
static int m16_check_op PARAMS ((rtx, int, int, int));
......@@ -3313,6 +3315,34 @@ gen_int_relational (test_code, result, cmp0, cmp1, p_invert)
return result;
}
/* Work out how to check a floating-point condition. We need a
separate comparison instruction (C.cond.fmt), followed by a
branch or conditional move. Given that IN_CODE is the
required condition, set *CMP_CODE to the C.cond.fmt code
and *action_code to the branch or move code. */
static void
get_float_compare_codes (in_code, cmp_code, action_code)
enum rtx_code in_code, *cmp_code, *action_code;
{
switch (in_code)
{
case NE:
case UNGE:
case UNGT:
case LTGT:
case ORDERED:
*cmp_code = reverse_condition_maybe_unordered (in_code);
*action_code = EQ;
break;
default:
*cmp_code = in_code;
*action_code = NE;
break;
}
}
/* Emit the common code for doing conditional branches.
operand[0] is the label to jump to.
The comparison operands are saved away by cmp{si,di,sf,df}. */
......@@ -3326,6 +3356,7 @@ gen_conditional_branch (operands, test_code)
rtx cmp0 = branch_cmp[0];
rtx cmp1 = branch_cmp[1];
enum machine_mode mode;
enum rtx_code cmp_code;
rtx reg;
int invert;
rtx label1, label2;
......@@ -3358,15 +3389,10 @@ gen_conditional_branch (operands, test_code)
else
reg = gen_reg_rtx (CCmode);
/* For cmp0 != cmp1, build cmp0 == cmp1, and test for result ==
0 in the instruction built below. The MIPS FPU handles
inequality testing by testing for equality and looking for a
false result. */
get_float_compare_codes (test_code, &cmp_code, &test_code);
emit_insn (gen_rtx_SET (VOIDmode, reg,
gen_rtx (test_code == NE ? EQ : test_code,
CCmode, cmp0, cmp1)));
gen_rtx (cmp_code, CCmode, cmp0, cmp1)));
test_code = test_code == NE ? EQ : NE;
mode = CCmode;
cmp0 = reg;
cmp1 = const0_rtx;
......@@ -3460,8 +3486,8 @@ gen_conditional_move (operands)
abort ();
}
}
else if (cmp_code == NE)
cmp_code = EQ, move_code = EQ;
else
get_float_compare_codes (cmp_code, &cmp_code, &move_code);
if (mode == SImode || mode == DImode)
cmp_mode = mode;
......
gcc/config/mips/mips.md
......@@ -8240,6 +8240,19 @@ move\\t%0,%z4\\n\\
}
}")
(define_expand "bunge"
[(set (pc)
(if_then_else (unge:CC (cc0)
(const_int 0))
(label_ref (match_operand 0 "" ""))
(pc)))]
""
"
{
gen_conditional_branch (operands, UNGE);
DONE;
}")
(define_expand "buneq"
[(set (pc)
(if_then_else (uneq:CC (cc0)
......@@ -8256,6 +8269,19 @@ move\\t%0,%z4\\n\\
}
}")
(define_expand "bltgt"
[(set (pc)
(if_then_else (ltgt:CC (cc0)
(const_int 0))
(label_ref (match_operand 0 "" ""))
(pc)))]
""
"
{
gen_conditional_branch (operands, LTGT);
DONE;
}")
(define_expand "bunle"
[(set (pc)
(if_then_else (unle:CC (cc0)
......@@ -8272,6 +8298,19 @@ move\\t%0,%z4\\n\\
}
}")
(define_expand "bungt"
[(set (pc)
(if_then_else (ungt:CC (cc0)
(const_int 0))
(label_ref (match_operand 0 "" ""))
(pc)))]
""
"
{
gen_conditional_branch (operands, UNGT);
DONE;
}")
(define_expand "beq"
[(set (pc)
(if_then_else (eq:CC (cc0)
......@@ -9340,18 +9379,6 @@ move\\t%0,%z4\\n\\
[(set_attr "type" "fcmp")
(set_attr "mode" "FPSW")])
(define_insn "sordered_df"
[(set (match_operand:CC 0 "register_operand" "=z")
(ordered:CC (match_operand:DF 1 "register_operand" "f")
(match_operand:DF 2 "register_operand" "f")))]
"TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT"
"*
{
return mips_fill_delay_slot (\"c.or.d\\t%Z0%1,%2\", DELAY_FCMP, operands, insn);
}"
[(set_attr "type" "fcmp")
(set_attr "mode" "FPSW")])
(define_insn "sunlt_df"
[(set (match_operand:CC 0 "register_operand" "=z")
(unlt:CC (match_operand:DF 1 "register_operand" "f")
......@@ -9460,18 +9487,6 @@ move\\t%0,%z4\\n\\
[(set_attr "type" "fcmp")
(set_attr "mode" "FPSW")])
(define_insn "sordered_sf"
[(set (match_operand:CC 0 "register_operand" "=z")
(ordered:CC (match_operand:SF 1 "register_operand" "f")
(match_operand:SF 2 "register_operand" "f")))]
"TARGET_HARD_FLOAT"
"*
{
return mips_fill_delay_slot (\"c.or.s\\t%Z0%1,%2\", DELAY_FCMP, operands, insn);
}"
[(set_attr "type" "fcmp")
(set_attr "mode" "FPSW")])
(define_insn "sunlt_sf"
[(set (match_operand:CC 0 "register_operand" "=z")
(unlt:CC (match_operand:SF 1 "register_operand" "f")
......
gcc/testsuite/ChangeLog
2002-10-01 Richard Sandiford <rsandifo@redhat.com>
* gcc.c-torture/compile/20020923-1.c: New test.
2002-09-30 Jason Thorpe <thorpej@wasabisystems.com>
* gcc.c-torture/execute/ffs-1.c: New test.
......
gcc/testsuite/gcc.c-torture/compile/20021001-1.c 0 → 100644
int foo (double x, double y)
{
return !__builtin_isunordered (x, y);
}
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