Commit 8a84c9a7 by Jie Zhang Committed by Jie Zhang

bfin.md (composev2hi): Put operands into vector with correct order.

	* config/bfin/bfin.md (composev2hi): Put operands into vector
	with correct order.

From-SVN: r127888
parent 4af797b5
2007-08-29 Jie Zhang <jie.zhang@analog.com>
* config/bfin/bfin.md (composev2hi): Put operands into vector
with correct order.
2007-08-29 Jie Zhang <jie.zhang@analog.com>
* config/bfin/bfin.c (bfin_expand_call): Inline PLT with l1_text
attribute when appropriate.
(bfin_handle_l1_text_attribute): New.
......
......@@ -2831,16 +2831,16 @@
(match_operand:HI 1 "register_operand" "d,d")))]
""
"@
%d0 = %h2 << 0%!
%d0 = %h1 << 0%!
#"
"reload_completed"
[(set (match_dup 0)
(vec_concat:V2HI
(vec_select:HI (match_dup 0) (parallel [(const_int 0)]))
(match_dup 2)))
(match_dup 1)))
(set (match_dup 0)
(vec_concat:V2HI
(match_dup 1)
(match_dup 2)
(vec_select:HI (match_dup 0) (parallel [(const_int 1)]))))]
""
[(set_attr "type" "dsp32")])
......
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