Commit 8a1a5194 by Tom de Vries Committed by Tom de Vries

Sort 'Other hardware attributes' table in sourcebuild.texi

2017-05-23  Tom de Vries  <tom@codesourcery.com>

	* doc/sourcebuild.texi (Effective-Target Keywords, Other hardware
	attributes): Sort alphabetically.

From-SVN: r248359
parent 0c36d0d5
2017-05-23 Tom de Vries <tom@codesourcery.com>
* doc/sourcebuild.texi (Effective-Target Keywords, Other hardware
attributes): Sort alphabetically.
2017-05-23 Georg-Johann Lay <avr@gjlay.de>
* config/avr/genmultilib.awk: Use gsub instead of gensub.
......
......@@ -1826,6 +1826,7 @@ PowerPC target supports executing VSX instructions (ISA 2.06).
@subsubsection Other hardware attributes
@c Please keep this table sorted alphabetically.
@table @code
@item avx
Target supports compiling @code{avx} instructions.
......@@ -1839,12 +1840,21 @@ Test system can execute AltiVec and Cell PPU instructions.
@item coldfire_fpu
Target uses a ColdFire FPU.
@item divmod
Target supporting hardware divmod insn or divmod libcall.
@item divmod_simode
Target supporting hardware divmod insn or divmod libcall for SImode.
@item hard_float
Target supports FPU instructions.
@item non_strict_align
Target does not require strict alignment.
@item pie_copyreloc
The x86-64 target linker supports PIE with copy reloc.
@item sqrt_insn
Target has a square root instruction that the compiler can generate.
......@@ -1874,15 +1884,6 @@ or @code{EM_SPARCV9} executables.
@item vect_cmdline_needed
Target requires a command line argument to enable a SIMD instruction set.
@item pie_copyreloc
The x86-64 target linker supports PIE with copy reloc.
@item divmod
Target supporting hardware divmod insn or divmod libcall.
@item divmod_simode
Target supporting hardware divmod insn or divmod libcall for SImode.
@end table
@subsubsection Environment attributes
......
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