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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
8983a18c
Commit
8983a18c
authored
Apr 15, 1992
by
Tom Wood
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From-SVN: r749
parent
c6f3187f
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12 additions
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6 deletions
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-6
gcc/config/m88k/m88k.md
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gcc/config/m88k/m88k.md
View file @
8983a18c
...
@@ -28,7 +28,7 @@
...
@@ -28,7 +28,7 @@
(define_expand "m88k_sccs_id"
(define_expand "m88k_sccs_id"
[
(match_operand:SI 0 "" "")
]
[
(match_operand:SI 0 "" "")
]
""
""
"{ static char sccs_id
[
] =
\"
@(#)m88k.md 2.1.
3.1 07 Apr 1992 17:25:37
\"
;
"{ static char sccs_id
[
] =
\"
@(#)m88k.md 2.1.
4.2 15 Apr 1992 15:39:48
\"
;
FAIL; }")
FAIL; }")
;; Attribute specifications
;; Attribute specifications
...
@@ -53,6 +53,14 @@
...
@@ -53,6 +53,14 @@
(const_string "arith"))
(const_string "arith"))
; Convenience attributes.
; Convenience attributes.
(define_attr "unit" "bit,memory,multiply,divide,fpadd,other"
(cond
[
(eq_attr "type" "bit,mbit") (const_string "bit")
(eq_attr "type" "load,store,mstore") (const_string "memory")
(eq_attr "type" "spmul,dpmul,imul") (const_string "multiply")
(eq_attr "type" "spdiv,dpdiv,idiv") (const_string "divide")
(eq_attr "type" "spadd,dpadd,spcmp,dpcmp,mfp") (const_string "fpadd")]
(const_string "other")))
(define_attr "fpu" "yes,no"
(define_attr "fpu" "yes,no"
(if_then_else
(if_then_else
(eq_attr "type" "spmul,dpmul,imul,spadd,dpadd,spcmp,dpcmp,spdiv,dpdiv,idiv,mfp")
(eq_attr "type" "spmul,dpmul,imul,spadd,dpadd,spcmp,dpcmp,spdiv,dpdiv,idiv,mfp")
...
@@ -1805,12 +1813,10 @@
...
@@ -1805,12 +1813,10 @@
"mul %0,%1,%2"
"mul %0,%1,%2"
[(set_attr "type" "imul")])
[(set_attr "type" "imul")])
;; @@ This isn't fully implemented yet.
(define_insn "umulsidi3"
(define_insn ""
[(set (match_operand:DI 0 "register_operand" "=r")
[(set (match_operand:DI 0 "register_operand" "=r")
(mult:DI (match_operand:SI 1 "arith32_operand" "%r"
)
(mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "%r")
)
(match_operand:SI 2 "arith32_operand" "rI"
)))]
(zero_extend:DI (match_operand:SI 2 "register_operand" "r")
)))]
"TARGET_88110"
"TARGET_88110"
"mulu.d %0,%1,%2"
"mulu.d %0,%1,%2"
[(set_attr "type" "imul")])
[(set_attr "type" "imul")])
...
...
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