re PR target/18230 (SPARC VIS instructions are not generated by GCC)

	PR target/18230
	* config/sparc/sparc.c (sparc_rtx_costs): Handle the NAND vector
	patterns.
	* config/sparc/sparc.md (V64I): New macro for 64-bit modes.
	(V32I): New macro for 32-bit modes.
	(anddi3, anddi_sp32, anddi_sp64, and_not_di_sp32, and_not_di_sp64,
	iordi3, iordi3_sp32, iordi_sp64, or_not_di_sp32, or_not_di_sp64,
	xordi3, xordi3_sp32, xordi3_sp64, {AND, IOR, XOR} DI splitter,
	xor_not_di_sp32, xordi_not_di_sp64, one_cmpldi2, one_cmpldi_sp32,
	one_cmpldi_sp64): Use V64I instead of DI.
	(andsi3, andsi_sp32, andsi_sp64, and_not_si, iorsi3, or_not_si,
	xorsi3, xor_not_si, one_cmplsi2): Use V32I instead of SI.
	(addv2si3, addv4hi3, addv2hi3): Remove % modifier.
	(nandv64i_vis, nandv32i_vis): New patterns.

Co-Authored-By: Eric Botcazou <ebotcazou@libertysurf.fr>

From-SVN: r90578

gcc/ChangeLog

+2004-11-13  James A. Morrison  <phython@gcc.gnu.org>
+            Eric Botcazou  <ebotcazou@libertysurf.fr>
+
+	PR target/18230
+	* config/sparc/sparc.c (sparc_rtx_costs): Handle the NAND vector
+	patterns.
+	* config/sparc/sparc.md (V64I): New macro for 64-bit modes.
+	(V32I): New macro for 32-bit modes.
+	(anddi3, anddi_sp32, anddi_sp64, and_not_di_sp32, and_not_di_sp64,
+	iordi3, iordi3_sp32, iordi_sp64, or_not_di_sp32, or_not_di_sp64,
+	xordi3, xordi3_sp32, xordi3_sp64, {AND, IOR, XOR} DI splitter,
+	xor_not_di_sp32, xordi_not_di_sp64, one_cmpldi2, one_cmpldi_sp32,
+	one_cmpldi_sp64): Use V64I instead of DI.
+	(andsi3, andsi_sp32, andsi_sp64, and_not_si, iorsi3, or_not_si,
+	xorsi3, xor_not_si, one_cmplsi2): Use V32I instead of SI.
+	(addv2si3, addv4hi3, addv2hi3): Remove % modifier.
+	(nandv64i_vis, nandv32i_vis): New patterns.
+
 2004-11-12  Mike Stump  <mrs@apple.com>
 
 	* Makefile.in: Add html support.

gcc/config/sparc/sparc.c

@@ -8688,6 +8688,18 @@ sparc_rtx_costs (rtx x, int code, int outer_code, int *total)
 	*total = sparc_costs->int_cmove;
       return false;
 
+    case IOR:
+      /* Handle the NAND vector patterns.  */
+      if (sparc_vector_mode_supported_p (GET_MODE (x))
+	  && GET_CODE (XEXP (x, 0)) == NOT
+	  && GET_CODE (XEXP (x, 1)) == NOT)
+	{
+	  *total = COSTS_N_INSNS (1);
+	  return true;
+	}
+      else
+        return false;
+
     default:
       return false;
     }

gcc/testsuite/ChangeLog

+2004-11-13  James A. Morrison  <phython@gcc.gnu.org>
+
+	* gcc.target/sparc/fand.c, gcc.target/sparc/fands,
+	gcc.target/sparc/fnand.c, gcc.target/sparc/fnands.c,
+	gcc.target/sparc/fxor.c, gcc.target/sparc/fxors.c,
+	gcc.target/sparc/fxnor.c, gcc.target/sparc/fxnors.c,
+	gcc.target/sparc/fandnot.c, gcc.target/sparc/fandnots.c,
+	gcc.target/sparc/fornot.c, gcc.target/sparc/fornots.c,
+	gcc.target/sparc/fnot.c, gcc.target/sparc/fnots.c,
+	gcc.target/sparc/for.c, gcc.target/sparc/fors.c,
+	gcc.target/sparc/combined-1.c: New tests.
+
 2004-11-12  Ziemowit Laski  <zlaski@apple.com>
 
 	* objc.dg/const-str-8.m, objc.dg/const-str-9.m:

gcc/testsuite/gcc.target/sparc/combined-1.c

+/* { dg-do compile } */
+/* { dg-options "-O -mcpu=ultrasparc -mvis" } */
+typedef short vec16 __attribute__((vector_size(8)));
+typedef int vec32 __attribute__((vector_size(8)));
+
+vec16 fun16(vec16 a, vec16 b)
+{
+  return (~a & b) + (b | a) - (a ^ b);
+}
+
+vec32 fun32(vec32 a, vec32 b)
+{
+  return (~a & b) + (b | a) - (a ^ b);
+}
+
+/* This should be transformed into ~b & a.  */
+vec16 fun16b(vec16 a, vec16 b)
+{
+  return (a & ~b) + (b | a) - (a ^ b);
+}
+
+vec32 fun32b(vec32 a, vec32 b)
+{
+  return (a & ~b) + (b | a) - (a ^ b);
+}
+
+/* { dg-final { scan-assembler-times "fandnot1\t%" 4 } } */
+/* { dg-final { scan-assembler-times "for\t%" 4 } } */
+/* { dg-final { scan-assembler-times "fpadd" 4 } } */
+/* { dg-final { scan-assembler-times "fxor\t%" 4 } } */
+/* { dg-final { scan-assembler-times "fpsub" 4 } } */

gcc/testsuite/gcc.target/sparc/fand.c

+/* { dg-do compile } */
+/* { dg-options "-O -mcpu=ultrasparc -mvis" } */
+typedef char  vec8 __attribute__((vector_size(8)));
+typedef short vec16 __attribute__((vector_size(8)));
+typedef int   vec32 __attribute__((vector_size(8)));
+
+extern vec8 foo1_8(void);
+extern vec8 foo2_8(void);
+
+vec8 fun8(void)
+{
+  return foo1_8 () & foo2_8 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec8 fun8_2(vec8 a, vec8 b)
+{
+  return a & b;
+}
+#endif
+
+extern vec16 foo1_16(void);
+extern vec16 foo2_16(void);
+
+vec16 fun16(void)
+{
+  return foo1_16 () & foo2_16 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec16 fun16_2(vec16 a, vec16 b)
+{
+  return a & b;
+}
+#endif
+
+extern vec32 foo1_32(void);
+extern vec32 foo2_32(void);
+
+vec32 fun32(void)
+{
+  return foo1_32 () & foo2_32 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec32 fun32_2(vec32 a, vec32 b)
+{
+  return a & b;
+}
+#endif
+
+/* { dg-final { scan-assembler-times "fand\t%" 3 } } */

gcc/testsuite/gcc.target/sparc/fandnot.c

+/* { dg-do compile } */
+/* { dg-options "-O -mcpu=ultrasparc -mvis" } */
+typedef char  vec8 __attribute__((vector_size(8)));
+typedef short vec16 __attribute__((vector_size(8)));
+typedef int   vec32 __attribute__((vector_size(8)));
+
+extern vec8 foo1_8(void);
+extern vec8 foo2_8(void);
+
+vec8 fun8(void)
+{
+  return ~foo1_8 () & foo2_8 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec8 fun8_2(vec8 a, vec8 b)
+{
+  return ~a & b;
+}
+#endif
+
+extern vec16 foo1_16(void);
+extern vec16 foo2_16(void);
+
+vec16 fun16(void)
+{
+  return ~foo1_16 () & foo2_16 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec16 fun16_2(vec16 a, vec16 b)
+{
+  return ~a & b;
+}
+#endif
+
+extern vec32 foo1_32(void);
+extern vec32 foo2_32(void);
+
+vec32 fun32(void)
+{
+  return ~foo1_32 () & foo2_32 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec32 fun32_2(vec32 a, vec32 b)
+{
+  return ~a & b;
+}
+#endif
+
+
+/* This should be transformed into ~b & a.  */
+vec8 fun8b(void)
+{
+  return foo1_8 () & ~foo2_8 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec8 fun8_2b(vec8 a, vec8 b)
+{
+  return a & ~b;
+}
+#endif
+
+vec16 fun16b(void)
+{
+  return foo1_16 () & ~foo2_16 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec16 fun16_2b(vec16 a, vec16 b)
+{
+  return a & ~b;
+}
+#endif
+
+vec32 fun32b(void)
+{
+  return foo1_32 () & ~foo2_32 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec32 fun32_2b(vec32 a, vec32 b)
+{
+  return a & ~b;
+}
+#endif
+
+/* { dg-final { scan-assembler-times "fandnot1\t%" 6 } } */

gcc/testsuite/gcc.target/sparc/fandnots.c

+/* { dg-do compile } */
+/* { dg-options "-O -mcpu=ultrasparc -mvis" } */
+typedef char vec8 __attribute__((vector_size(4)));
+typedef short vec16 __attribute__((vector_size(4)));
+
+extern vec8 foo1_8(void);
+extern vec8 foo2_8(void);
+
+vec8 fun8(void)
+{
+  return ~foo1_8 () & foo2_8 ();
+}
+
+extern vec16 foo1_16(void);
+extern vec16 foo2_16(void);
+
+vec16 fun16(void)
+{
+  return ~foo1_16 () & foo1_16 ();
+}
+
+
+/* This should be transformed into ~b & a.  */
+vec8 fun8b(void)
+{
+  return foo1_8 () & ~foo2_8 ();
+}
+
+vec16 fun16b(void)
+{
+  return foo1_16 () & ~foo1_16 ();
+}
+
+/* { dg-final { scan-assembler-times "fandnot1s\t%" 4 } } */

gcc/testsuite/gcc.target/sparc/fands.c

+/* { dg-do compile } */
+/* { dg-options "-mcpu=ultrasparc -mvis" } */
+typedef char vec8 __attribute__((vector_size(4)));
+typedef short vec16 __attribute__((vector_size(4)));
+
+extern vec8 foo1_8(void);
+extern vec8 foo2_8(void);
+
+vec8 fun8(void)
+{
+  return foo1_8 () & foo2_8 ();
+}
+
+extern vec16 foo1_16(void);
+extern vec16 foo2_16(void);
+
+vec16 fun16(void)
+{
+  return foo1_16 () & foo1_16 ();
+}
+
+/* { dg-final { scan-assembler-times "fands\t%" 2 } } */

gcc/testsuite/gcc.target/sparc/fnand.c

+/* { dg-do compile } */
+/* { dg-options "-O -mcpu=ultrasparc -mvis" } */
+typedef char  vec8 __attribute__((vector_size(8)));
+typedef short vec16 __attribute__((vector_size(8)));
+typedef int   vec32 __attribute__((vector_size(8)));
+
+extern vec8 foo1_8(void);
+extern vec8 foo2_8(void);
+
+vec8 fun8(void)
+{
+  return ~(foo1_8 () & foo2_8 ());
+}
+
+extern vec16 foo1_16(void);
+extern vec16 foo2_16(void);
+
+vec16 fun16(void)
+{
+  return ~(foo1_16 () & foo2_16 ());
+}
+
+extern vec32 foo1_32(void);
+extern vec32 foo2_32(void);
+
+vec32 fun32(void)
+{
+  return ~(foo1_32 () & foo2_32 ());
+}
+
+
+/* DeMorgan's Law's at work.  */
+vec8 fun8b(void)
+{
+  return ~foo1_8 () | ~foo2_8 ();
+}
+
+vec16 fun16b(void)
+{
+  return ~foo1_16 () | ~foo2_16 ();
+}
+
+vec32 fun32b(void)
+{
+  return ~foo1_32 () | ~foo2_32 ();
+}
+
+/* { dg-final { scan-assembler-times "fnand\t%" 6 } } */

gcc/testsuite/gcc.target/sparc/fnands.c

+/* { dg-do compile } */
+/* { dg-options "-O -mcpu=ultrasparc -mvis" } */
+typedef char vec8 __attribute__((vector_size(4)));
+typedef short vec16 __attribute__((vector_size(4)));
+
+extern vec8 foo1_8(void);
+extern vec8 foo2_8(void);
+
+vec8 fun8(void)
+{
+  return ~(foo1_8 () & foo2_8 ());
+}
+
+extern vec16 foo1_16(void);
+extern vec16 foo2_16(void);
+
+vec16 fun16(void)
+{
+  return ~(foo1_16 () & foo1_16 ());
+}
+
+/* DeMorgan's Law's at work.  */
+vec8 fun8b(void)
+{
+  return ~foo1_8 () | ~foo2_8 ();
+}
+
+vec16 fun16b(void)
+{
+  return ~foo1_16 () | ~foo1_16 ();
+}
+
+/* { dg-final { scan-assembler-times "fnands\t%" 4 } } */

gcc/testsuite/gcc.target/sparc/fnot.c

+/* { dg-do compile } */
+/* { dg-options "-O -mcpu=ultrasparc -mvis" } */
+typedef char  vec8 __attribute__((vector_size(8)));
+typedef short vec16 __attribute__((vector_size(8)));
+typedef int   vec32 __attribute__((vector_size(8)));
+
+extern vec8 foo1_8(void);
+extern void foo2_8(vec8);
+
+vec8 fun8(void)
+{
+  return ~foo1_8 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec8 fun8_2(vec8 a)
+{
+  foo2_8 (~a);
+}
+#endif
+
+extern vec16 foo1_16(void);
+extern void foo2_16(vec8);
+
+
+vec16 fun16(void)
+{
+  return ~foo1_16 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec16 fun16_2(vec16 a)
+{
+  foo2_16 (~a);
+}
+#endif
+
+extern vec32 foo1_32(void);
+extern void foo2_32(vec8);
+
+vec32 fun32(void)
+{
+  return ~foo1_32 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec32 fun32_2(vec32 a)
+{
+  foo2_32 (~a);
+}
+#endif
+
+/* { dg-final { scan-assembler-times "fnot1\t%" 3 } } */

gcc/testsuite/gcc.target/sparc/fnots.c

+/* { dg-do compile } */
+/* { dg-options "-O -mcpu=ultrasparc -mvis" } */
+typedef char vec8 __attribute__((vector_size(4)));
+typedef short vec16 __attribute__((vector_size(4)));
+
+extern vec8 foo1_8(void);
+
+vec8 fun8(void)
+{
+  return ~foo1_8 ();
+}
+
+extern vec16 foo1_16(void);
+
+vec16 fun16(void)
+{
+  return ~foo1_16 ();
+}
+
+/* { dg-final { scan-assembler-times "fnot1s\t%" 2 } } */

gcc/testsuite/gcc.target/sparc/for.c

+/* { dg-do compile } */
+/* { dg-options "-O -mcpu=ultrasparc -mvis" } */
+typedef char  vec8 __attribute__((vector_size(8)));
+typedef short vec16 __attribute__((vector_size(8)));
+typedef int   vec32 __attribute__((vector_size(8)));
+
+extern vec8 foo1_8(void);
+extern vec8 foo2_8(void);
+
+vec8 fun8(void)
+{
+  return foo1_8 () | foo2_8 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec8 fun8_2(vec8 a, vec8 b)
+{
+  return a | b;
+}
+#endif
+
+extern vec16 foo1_16(void);
+extern vec16 foo2_16(void);
+
+vec16 fun16(void)
+{
+  return foo1_16 () | foo2_16 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec16 fun16_2(vec16 a, vec16 b)
+{
+  return a | b;
+}
+#endif
+
+extern vec32 foo1_32(void);
+extern vec32 foo2_32(void);
+
+vec32 fun32(void)
+{
+  return foo1_32 () | foo2_32 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec32 fun32_2(vec32 a, vec32 b)
+{
+  return a | b;
+}
+#endif
+
+/* { dg-final { scan-assembler-times "for\t%" 3 } } */

gcc/testsuite/gcc.target/sparc/fornot.c

+/* { dg-do compile } */
+/* { dg-options "-O -mcpu=ultrasparc -mvis" } */
+typedef char  vec8 __attribute__((vector_size(8)));
+typedef short vec16 __attribute__((vector_size(8)));
+typedef int   vec32 __attribute__((vector_size(8)));
+
+extern vec8 foo1_8(void);
+extern vec8 foo2_8(void);
+
+vec8 fun8(void)
+{
+  return ~foo1_8 () | foo2_8 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec8 fun8_2(vec8 a, vec8 b)
+{
+  return ~a | b;
+}
+#endif
+
+extern vec16 foo1_16(void);
+extern vec16 foo2_16(void);
+
+vec16 fun16(void)
+{
+  return ~foo1_16 () | foo2_16 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec16 fun16_2(vec16 a, vec16 b)
+{
+  return ~a | b;
+}
+#endif
+
+extern vec32 foo1_32(void);
+extern vec32 foo2_32(void);
+
+vec32 fun32(void)
+{
+  return ~foo1_32 () | foo2_32 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec32 fun32_2(vec32 a, vec32 b)
+{
+  return ~a | b;
+}
+#endif
+
+
+/* This should be transformed into ~b | a.  */
+vec8 fun8b(void)
+{
+  return foo1_8 () | ~foo2_8 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec8 fun8_2b(vec8 a, vec8 b)
+{
+  return a | ~b;
+}
+#endif
+
+vec16 fun16b(void)
+{
+  return foo1_16 () | ~foo2_16 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec16 fun16_2b(vec16 a, vec16 b)
+{
+  return a | ~b;
+}
+#endif
+
+vec32 fun32b(void)
+{
+  return foo1_32 () | ~foo2_32 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec32 fun32_2b(vec32 a, vec32 b)
+{
+  return a | ~b;
+}
+#endif
+
+/* { dg-final { scan-assembler-times "fornot1\t%" 6 } } */

gcc/testsuite/gcc.target/sparc/fornots.c

+/* { dg-do compile } */
+/* { dg-options "-O -mcpu=ultrasparc -mvis" } */
+typedef char vec8 __attribute__((vector_size(4)));
+typedef short vec16 __attribute__((vector_size(4)));
+
+extern vec8 foo1_8(void);
+extern vec8 foo2_8(void);
+
+vec8 fun8(void)
+{
+  return ~foo1_8 () | foo2_8 ();
+}
+
+extern vec16 foo1_16(void);
+extern vec16 foo2_16(void);
+
+vec16 fun16(void)
+{
+  return ~foo1_16 () | foo1_16 ();
+}
+
+
+/* This should be transformed into ~b | a.  */
+vec8 fun8b(void)
+{
+  return foo1_8 () | ~foo2_8 ();
+}
+
+vec16 fun16b(void)
+{
+  return foo1_16 () | ~foo1_16 ();
+}
+
+/* { dg-final { scan-assembler-times "fornot1s\t%" 4 } } */

gcc/testsuite/gcc.target/sparc/fors.c

+/* { dg-do compile } */
+/* { dg-options "-mcpu=ultrasparc -mvis" } */
+typedef char vec8 __attribute__((vector_size(4)));
+typedef short vec16 __attribute__((vector_size(4)));
+
+extern vec8 foo1_8(void);
+extern vec8 foo2_8(void);
+
+vec8 fun8(void)
+{
+  return foo1_8 () | foo2_8 ();
+}
+
+extern vec16 foo1_16(void);
+extern vec16 foo2_16(void);
+
+vec16 fun16(void)
+{
+  return foo1_16 () | foo1_16 ();
+}
+
+/* { dg-final { scan-assembler-times "fors\t%" 2 } } */

gcc/testsuite/gcc.target/sparc/fxnor.c

+/* { dg-do compile } */
+/* { dg-options "-O -mcpu=ultrasparc -mvis" } */
+typedef char  vec8 __attribute__((vector_size(8)));
+typedef short vec16 __attribute__((vector_size(8)));
+typedef int   vec32 __attribute__((vector_size(8)));
+
+extern vec8 foo1_8(void);
+extern vec8 foo2_8(void);
+
+vec8 fun8(void)
+{
+  return ~(foo1_8 () ^ foo2_8 ());
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec8 fun8_2(vec8 a, vec8 b)
+{
+  return ~(a ^ b);
+}
+#endif
+
+extern vec16 foo1_16(void);
+extern vec16 foo2_16(void);
+
+vec16 fun16(void)
+{
+  return ~(foo1_16 () ^ foo2_16 ());
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec16 fun16_2(vec16 a, vec16 b)
+{
+  return ~(a ^ b);
+}
+#endif
+
+extern vec32 foo1_32(void);
+extern vec32 foo2_32(void);
+
+vec32 fun32(void)
+{
+  return ~(foo1_32 () ^ foo2_32 ());
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec32 fun32_2(vec32 a, vec32 b)
+{
+  return ~(a ^ b);
+}
+#endif
+
+
+/* This should be transformed into ~(b ^ a).  */
+vec8 fun8b(void)
+{
+  return foo1_8 () ^ ~foo2_8 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec8 fun8_2b(vec8 a, vec8 b)
+{
+  return a ^ ~b;
+}
+#endif
+
+vec16 fun16b(void)
+{
+  return foo1_16 () ^ ~foo2_16 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec16 fun16_2b(vec16 a, vec16 b)
+{
+  return a ^ ~b;
+}
+#endif
+
+vec32 fun32b(void)
+{
+  return foo1_32 () ^ ~foo2_32 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec32 fun32_2b(vec32 a, vec32 b)
+{
+  return a ^ ~b;
+}
+#endif
+
+/* { dg-final { scan-assembler-times "fxnor\t%" 6 } } */

gcc/testsuite/gcc.target/sparc/fxnors.c

+/* { dg-do compile } */
+/* { dg-options "-O -mcpu=ultrasparc -mvis" } */
+typedef char vec8 __attribute__((vector_size(4)));
+typedef short vec16 __attribute__((vector_size(4)));
+
+extern vec8 foo1_8(void);
+extern vec8 foo2_8(void);
+
+vec8 fun8(void)
+{
+  return ~(foo1_8 () ^ foo2_8 ());
+}
+
+extern vec16 foo1_16(void);
+extern vec16 foo2_16(void);
+
+vec16 fun16(void)
+{
+  return ~(foo1_16 () ^ foo1_16 ());
+}
+
+
+/* This should be transformed into ~(b ^ a).  */
+vec8 fun8b(void)
+{
+  return foo1_8 () ^ ~foo2_8 ();
+}
+
+vec16 fun16b(void)
+{
+  return foo1_16 () ^ ~foo1_16 ();
+}
+
+/* { dg-final { scan-assembler-times "fxnors\t%" 4 } } */

gcc/testsuite/gcc.target/sparc/fxor.c

+/* { dg-do compile } */
+/* { dg-options "-O -mcpu=ultrasparc -mvis" } */
+typedef char  vec8 __attribute__((vector_size(8)));
+typedef short vec16 __attribute__((vector_size(8)));
+typedef int   vec32 __attribute__((vector_size(8)));
+
+extern vec8 foo1_8(void);
+extern vec8 foo2_8(void);
+
+vec8 fun8(void)
+{
+  return foo1_8 () ^ foo2_8 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec8 fun8_2(vec8 a, vec8 b)
+{
+  return a ^ b;
+}
+#endif
+
+extern vec16 foo1_16(void);
+extern vec16 foo2_16(void);
+
+vec16 fun16(void)
+{
+  return foo1_16 () ^ foo2_16 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec16 fun16_2(vec16 a, vec16 b)
+{
+  return a ^ b;
+}
+#endif
+
+extern vec32 foo1_32(void);
+extern vec32 foo2_32(void);
+
+vec32 fun32(void)
+{
+  return foo1_32 () ^ foo2_32 ();
+}
+
+#ifndef __LP64__
+/* Test the 32-bit splitter. */
+vec32 fun32_2(vec32 a, vec32 b)
+{
+  return a ^ b;
+}
+#endif
+
+/* { dg-final { scan-assembler-times "fxor\t%" 3 } } */

gcc/testsuite/gcc.target/sparc/fxors.c

+/* { dg-do compile } */
+/* { dg-options "-O -mcpu=ultrasparc -mvis" } */
+typedef char vec8 __attribute__((vector_size(4)));
+typedef short vec16 __attribute__((vector_size(4)));
+
+extern vec8 foo1_8(void);
+extern vec8 foo2_8(void);
+
+vec8 fun8(void)
+{
+  return foo1_8 () ^ foo2_8 ();
+}
+
+extern vec16 foo1_16(void);
+extern vec16 foo2_16(void);
+
+vec16 fun16(void)
+{
+  return foo1_16 () ^ foo1_16 ();
+}
+
+/* { dg-final { scan-assembler-times "fxors\t%" 2 } } */