Commit 88e25f47 by Sam Tebbs Committed by Richard Earnshaw

[aarch64] Make common aarch64 options target-dependent

This patch replaces the "Common" attribute in some aarch64 options with "Target"
to make them target-dependent. This doesn't affect their behaviour or how they
are documented with "--help", but does mean that they follow the option
specification that target-specific options are given the "Target" attribute.

Tested by ensuring the changed options are still accepted as before and that
they aren't invokable from an invalid target. Bootstrapped and regression tested
on aarch64-none-elf with ... regressions.

2018-08-16  Sam Tebbs  <sam.tebbs@arm.com>

	* config/aarch64/aarch64.opt (mlow-precision-recip-sqrt)
	(mlow-precision-sqrt, mlow-precision-div, mverbose-cost-dump): Replace
	"Common" with "Target".

From-SVN: r263578
parent c553659e
2018-08-16 Sam Tebbs <sam.tebbs@arm.com>
* config/aarch64/aarch64.opt (mlow-precision-recip-sqrt)
(mlow-precision-sqrt, mlow-precision-div, mverbose-cost-dump): Replace
"Common" with "Target".
2018-08-15 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.opt (mmitigate-rop): Mark as deprecated.
......
......@@ -167,20 +167,20 @@ EnumValue
Enum(aarch64_ra_sign_scope_t) String(all) Value(AARCH64_FUNCTION_ALL)
mlow-precision-recip-sqrt
Common Var(flag_mrecip_low_precision_sqrt) Optimization
Target Var(flag_mrecip_low_precision_sqrt) Optimization
Enable the reciprocal square root approximation. Enabling this reduces
precision of reciprocal square root results to about 16 bits for
single precision and to 32 bits for double precision.
mlow-precision-sqrt
Common Var(flag_mlow_precision_sqrt) Optimization
Target Var(flag_mlow_precision_sqrt) Optimization
Enable the square root approximation. Enabling this reduces
precision of square root results to about 16 bits for
single precision and to 32 bits for double precision.
If enabled, it implies -mlow-precision-recip-sqrt.
mlow-precision-div
Common Var(flag_mlow_precision_div) Optimization
Target Var(flag_mlow_precision_div) Optimization
Enable the division approximation. Enabling this reduces
precision of division results to about 16 bits for
single precision and to 32 bits for double precision.
......@@ -212,7 +212,7 @@ Target RejectNegative Joined Enum(sve_vector_bits) Var(aarch64_sve_vector_bits)
-msve-vector-bits=N Set the number of bits in an SVE vector register to N.
mverbose-cost-dump
Common Undocumented Var(flag_aarch64_verbose_cost)
Target Undocumented Var(flag_aarch64_verbose_cost)
Enables verbose cost model dumping in the debug dump files.
mtrack-speculation
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment