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riscv-gcc-1
Commit 888142a6 by Nick Clifton Committed by Nick Clifton
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* config/iq2000/iq2000.h (IRA_COVER_CLASSES): Define. 

From-SVN: r139720
parent b34126ed
Showing with 9 additions and 1 deletions
gcc/ChangeLog
2008-08-28 Nick Clifton <nickc@redhat.com> 2008-08-28 Nick Clifton <nickc@redhat.com>
* config/iq2000/iq2000.h (IRA_COVER_CLASSES): Define.
* config/fr30/fr30.h (IRA_COVER_CLASSES): Define. * config/fr30/fr30.h (IRA_COVER_CLASSES): Define.
* config/m32r/m32r.h (IRA_COVER_CLASSES): Define. * config/m32r/m32r.h (IRA_COVER_CLASSES): Define.
......
gcc/config/iq2000/iq2000.h
/* Definitions of target machine for GNU compiler. /* Definitions of target machine for GNU compiler.
Vitesse IQ2000 processors Vitesse IQ2000 processors
Copyright (C) 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc. Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008
Free Software Foundation, Inc.
This file is part of GCC. This file is part of GCC.
...@@ -201,6 +202,11 @@ enum reg_class ...@@ -201,6 +202,11 @@ enum reg_class
#define N_REG_CLASSES (int) LIM_REG_CLASSES #define N_REG_CLASSES (int) LIM_REG_CLASSES
#define IRA_COVER_CLASSES \
{ \
GR_REGS, LIM_REG_CLASSES \
}
#define REG_CLASS_NAMES \ #define REG_CLASS_NAMES \
{ \ { \
"NO_REGS", \ "NO_REGS", \
......
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