Commit 87d9741e by Kazu Hirata Committed by Kazu Hirata

combine.c (if_then_else_cond): Simplify the comparison of rtx against -1, 0, and 1.

	* combine.c (if_then_else_cond): Simplify the comparison of
	rtx against -1, 0, and 1.
	* loop.c (check_dbra_loop): Likewise.
	* optabs.c (emit_conditional_move): Likewise.
	(emit_conditional_add): Likewise.
	* config/i386/i386.md (*movsi_or): Likewise.
	(*movdi_or_rex6): Likewise.

From-SVN: r69658
parent 32d0e51b
2003-07-22 Kazu Hirata <kazu@cs.umass.edu>
* combine.c (if_then_else_cond): Simplify the comparison of
rtx against -1, 0, and 1.
* loop.c (check_dbra_loop): Likewise.
* optabs.c (emit_conditional_move): Likewise.
(emit_conditional_add): Likewise.
* config/i386/i386.md (*movsi_or): Likewise.
(*movdi_or_rex6): Likewise.
Tue Jul 22 00:42:12 CEST 2003 Jan Hubicka <jh@suse.cz>
* cgraphunit.c (cgraph_finalize_compilation_unit): Remove redundant if.
......
......@@ -7345,7 +7345,7 @@ if_then_else_cond (rtx x, rtx *ptrue, rtx *pfalse)
/* If we are comparing a value against zero, we are done. */
if ((code == NE || code == EQ)
&& GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) == 0)
&& XEXP (x, 1) == const0_rtx)
{
*ptrue = (code == NE) ? const_true_rtx : const0_rtx;
*pfalse = (code == NE) ? const0_rtx : const_true_rtx;
......
......@@ -1166,8 +1166,8 @@
[(set (match_operand:SI 0 "register_operand" "=r")
(match_operand:SI 1 "immediate_operand" "i"))
(clobber (reg:CC 17))]
"reload_completed && GET_CODE (operands[1]) == CONST_INT
&& INTVAL (operands[1]) == -1
"reload_completed
&& operands[1] == constm1_rtx
&& (TARGET_PENTIUM || optimize_size)"
{
operands[1] = constm1_rtx;
......@@ -1930,8 +1930,7 @@
(clobber (reg:CC 17))]
"TARGET_64BIT && (TARGET_PENTIUM || optimize_size)
&& reload_completed
&& GET_CODE (operands[1]) == CONST_INT
&& INTVAL (operands[1]) == -1"
&& operands[1] == constm1_rtx"
{
operands[1] = constm1_rtx;
return "or{q}\t{%1, %0|%0, %1}";
......
......@@ -8034,9 +8034,7 @@ check_dbra_loop (struct loop *loop, int insn_count)
In this case, add a reg_note REG_NONNEG, which allows the
m68k DBRA instruction to be used. */
if (((GET_CODE (comparison) == GT
&& GET_CODE (XEXP (comparison, 1)) == CONST_INT
&& INTVAL (XEXP (comparison, 1)) == -1)
if (((GET_CODE (comparison) == GT && XEXP (comparison, 1) == constm1_rtx)
|| (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
&& GET_CODE (bl->biv->add_val) == CONST_INT
&& INTVAL (bl->biv->add_val) < 0)
......
......@@ -4259,9 +4259,9 @@ emit_conditional_move (rtx target, enum rtx_code code, rtx op0, rtx op1,
/* get_condition will prefer to generate LT and GT even if the old
comparison was against zero, so undo that canonicalization here since
comparisons against zero are cheaper. */
if (code == LT && GET_CODE (op1) == CONST_INT && INTVAL (op1) == 1)
if (code == LT && op1 == const1_rtx)
code = LE, op1 = const0_rtx;
else if (code == GT && GET_CODE (op1) == CONST_INT && INTVAL (op1) == -1)
else if (code == GT && op1 == constm1_rtx)
code = GE, op1 = const0_rtx;
if (cmode == VOIDmode)
......@@ -4400,9 +4400,9 @@ emit_conditional_add (rtx target, enum rtx_code code, rtx op0, rtx op1,
/* get_condition will prefer to generate LT and GT even if the old
comparison was against zero, so undo that canonicalization here since
comparisons against zero are cheaper. */
if (code == LT && GET_CODE (op1) == CONST_INT && INTVAL (op1) == 1)
if (code == LT && op1 == const1_rtx)
code = LE, op1 = const0_rtx;
else if (code == GT && GET_CODE (op1) == CONST_INT && INTVAL (op1) == -1)
else if (code == GT && op1 == constm1_rtx)
code = GE, op1 = const0_rtx;
if (cmode == VOIDmode)
......
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