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Commit 87ca01b7 by Quentin Neill Committed by Harsha Jagasia
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Piledriver f16cintrin.h fix. 

2011-11-04  Quentin Neill  <quentin.neill@amd.com>

	Piledriver f16cintrin.h fix.
	* config/i386/f16cintrin.h: Contents moved from immintrin.h.
	* config/config.gcc: Add f16cintrin.h.

From-SVN: r180999
parent a73c1a72
Showing with 104 additions and 59 deletions
gcc/ChangeLog
2011-11-05 Quentin Neill <quentin.neill@amd.com>
Piledriver f16cintrin.h fix.
* config/i386/f16cintrin.h: Contents moved from immintrin.h.
* config/config.gcc: Add f16cintrin.h.
2011-11-04 Eric Botcazou <ebotcazou@adacore.com>
PR c++/50608
gcc/config/i386/f16cintrin.h 0 → 100644
/* Copyright (C) 2011
Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
#ifndef _X86INTRIN_H_INCLUDED
#if (!defined(_X86INTRIN_H_INCLUDED) && !defined(_IMMINTRIN_H_INCLUDED))
# error "Never use <f16intrin.h> directly; include <x86intrin.h> or <immintrin.h> instead."
#endif
#ifndef __F16C__
# error "F16C instruction set not enabled"
#else
#ifndef _F16CINTRIN_H_INCLUDED
#define _F16CINTRIN_H_INCLUDED
extern __inline float __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_cvtsh_ss (unsigned short __S)
{
__v8hi __H = __extension__ (__v8hi){ __S, 0, 0, 0, 0, 0, 0, 0 };
__v4sf __A = __builtin_ia32_vcvtph2ps (__H);
return __builtin_ia32_vec_ext_v4sf (__A, 0);
}
extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_cvtph_ps (__m128i __A)
{
return (__m128) __builtin_ia32_vcvtph2ps ((__v8hi) __A);
}
extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cvtph_ps (__m128i __A)
{
return (__m256) __builtin_ia32_vcvtph2ps256 ((__v8hi) __A);
}
#ifdef __OPTIMIZE__
extern __inline unsigned short __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_cvtss_sh (float __F, const int __I)
{
__v4sf __A = __extension__ (__v4sf){ __F, 0, 0, 0 };
__v8hi __H = __builtin_ia32_vcvtps2ph (__A, __I);
return (unsigned short) __builtin_ia32_vec_ext_v8hi (__H, 0);
}
extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_cvtps_ph (__m128 __A, const int __I)
{
return (__m128i) __builtin_ia32_vcvtps2ph ((__v4sf) __A, __I);
}
extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cvtps_ph (__m256 __A, const int __I)
{
return (__m128i) __builtin_ia32_vcvtps2ph256 ((__v8sf) __A, __I);
}
#else
#define _cvtss_sh(__F, __I) \
(__extension__ \
({ \
__v4sf __A = __extension__ (__v4sf){ __F, 0, 0, 0 }; \
__v8hi __H = __builtin_ia32_vcvtps2ph (__A, __I); \
(unsigned short) __builtin_ia32_vec_ext_v8hi (__H, 0); \
}))
#define _mm_cvtps_ph(A, I) \
((__m128i) __builtin_ia32_vcvtps2ph ((__v4sf)(__m128) A, (int) (I)))
#define _mm256_cvtps_ph(A, I) \
((__m128i) __builtin_ia32_vcvtps2ph256 ((__v8sf)(__m256) A, (int) (I)))
#endif
#endif /* __F16C__ */
#endif
gcc/config/i386/immintrin.h
......@@ -76,6 +76,10 @@
#include <fmaintrin.h>
#endif
#ifdef __F16C__
#include <f16cintrin.h>
#endif
#ifdef __RDRND__
extern __inline int
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
......@@ -161,63 +165,4 @@ _rdrand64_step (unsigned long long *__P)
#endif /* __RDRND__ */
#endif /* __x86_64__ */
#ifdef __F16C__
extern __inline float __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_cvtsh_ss (unsigned short __S)
{
__v8hi __H = __extension__ (__v8hi){ __S, 0, 0, 0, 0, 0, 0, 0 };
__v4sf __A = __builtin_ia32_vcvtph2ps (__H);
return __builtin_ia32_vec_ext_v4sf (__A, 0);
}
extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_cvtph_ps (__m128i __A)
{
return (__m128) __builtin_ia32_vcvtph2ps ((__v8hi) __A);
}
extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cvtph_ps (__m128i __A)
{
return (__m256) __builtin_ia32_vcvtph2ps256 ((__v8hi) __A);
}
#ifdef __OPTIMIZE__
extern __inline unsigned short __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_cvtss_sh (float __F, const int __I)
{
__v4sf __A = __extension__ (__v4sf){ __F, 0, 0, 0 };
__v8hi __H = __builtin_ia32_vcvtps2ph (__A, __I);
return (unsigned short) __builtin_ia32_vec_ext_v8hi (__H, 0);
}
extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_cvtps_ph (__m128 __A, const int __I)
{
return (__m128i) __builtin_ia32_vcvtps2ph ((__v4sf) __A, __I);
}
extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cvtps_ph (__m256 __A, const int __I)
{
return (__m128i) __builtin_ia32_vcvtps2ph256 ((__v8sf) __A, __I);
}
#else
#define _cvtss_sh(__F, __I) \
(__extension__ \
({ \
__v4sf __A = __extension__ (__v4sf){ __F, 0, 0, 0 }; \
__v8hi __H = __builtin_ia32_vcvtps2ph (__A, __I); \
(unsigned short) __builtin_ia32_vec_ext_v8hi (__H, 0); \
}))
#define _mm_cvtps_ph(A, I) \
((__m128i) __builtin_ia32_vcvtps2ph ((__v4sf)(__m128) A, (int) (I)))
#define _mm256_cvtps_ph(A, I) \
((__m128i) __builtin_ia32_vcvtps2ph256 ((__v8sf)(__m256) A, (int) (I)))
#endif
#endif /* __F16C__ */
#endif /* _IMMINTRIN_H_INCLUDED */
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