Commit 87673f84 by Uros Bizjak

re PR target/38931 (Seg fault when getting instruction latency on a *movsi_1…

re PR target/38931 (Seg fault when getting instruction latency on a *movsi_1 with an MMX target register)

	PR target/38931
	* config/i386/i386.md (*movsi_1): Use type "mmx" for alternative 2.
	(*movdi_1_rex64): Use type "mmx" for alternative 5.

testsuite/ChangeLog:

	PR target/38931
	* gcc.target/i386/pr38931.c: New test.

From-SVN: r143567
parent 96339268
2009-01-22 Uros Bizjak <ubizjak@gmail.com>
PR target/38931
* config/i386/i386.md (*movsi_1): Use type "mmx" for alternative 2.
(*movdi_1_rex64): Use type "mmx" for alternative 5.
2009-01-22 Richard Earnshaw <rearnsha@arm.com>
* arm.h (DATA_ALIGNMENT): Align structures, unions and arrays to
......@@ -5,7 +11,7 @@
(LOCAL_ALIGNMENT): Similarly.
2009-01-22 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* config/arm/arm.c (all_architectures): Add iWMMXt2 entry.
* config/arm/arm-cores.def: New ARM_CORE entry for iWMMXt2.
......
......@@ -1534,7 +1534,7 @@
gcc_unreachable ();
}
case TYPE_MMXADD:
case TYPE_MMX:
return "pxor\t%0, %0";
case TYPE_MMXMOV:
......@@ -1552,7 +1552,7 @@
}
[(set (attr "type")
(cond [(eq_attr "alternative" "2")
(const_string "mmxadd")
(const_string "mmx")
(eq_attr "alternative" "3,4,5")
(const_string "mmxmov")
(eq_attr "alternative" "6")
......@@ -2370,7 +2370,7 @@
case TYPE_SSELOG1:
return "%vpxor\t%0, %d0";
case TYPE_MMXADD:
case TYPE_MMX:
return "pxor\t%0, %0";
case TYPE_MULTI:
......@@ -2391,7 +2391,7 @@
}
[(set (attr "type")
(cond [(eq_attr "alternative" "5")
(const_string "mmxadd")
(const_string "mmx")
(eq_attr "alternative" "6,7,8,9,10")
(const_string "mmxmov")
(eq_attr "alternative" "11")
......
2009-01-22 Uros Bizjak <ubizjak@gmail.com>
PR target/38931
* gcc.target/i386/pr38931.c: New test.
2009-01-22 Dodji Seketeli <dodji@redhat.com>
PR c++/38930
......
/* { dg-do compile } */
/* { dg-options "-O2 -msse" } */
typedef int __m64 __attribute__ ((__vector_size__ (8)));
extern __m64 foo () ;
void bar (const int input_bpl, const unsigned char *input,
unsigned char *output, unsigned long x1)
{
unsigned char *pix_end_ptr = output + x1 * 4;
__m64 m_original = { 0, 0 };
__m64 m_base_addr = __builtin_ia32_vec_init_v2si (0, input_bpl);
__m64 m_addr = __builtin_ia32_paddd (m_original, m_base_addr);
__m64 *a0 = (__m64 *) input;
for (; output < pix_end_ptr; output += 4)
{
a0 = (__m64 *) (input + __builtin_ia32_vec_ext_v2si (m_addr, 0));
m_addr = foo ();
__builtin_prefetch (a0, 0);
}
}
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