[NDS32] Add constraint for lwi45.fe instruction.

gcc/
	* config/nds32/constraints.md (Ufe): New memory constraint.
	* config/nds32/nds32-md-auxiliary.c (nds32_mem_format,
	nds32_output_16bit_load): Consider r8 register for lwi45.fe format.
	* config/nds32/nds32.c (nds32_print_operand): Output lwi45.fe
	operands.
	* config/nds32/nds32.h (nds32_16bit_address_type): Add ADDRESS_R8_IMM7U.
	* config/nds32/nds32.md (*mov<mode>): Adjust pattern.

Co-Authored-By: Kito Cheng <kito.cheng@gmail.com>

From-SVN: r259121

gcc/ChangeLog

+2018-04-05  Shiva Chen  <shiva0217@gmail.com>
+	    Kito Cheng  <kito.cheng@gmail.com>
+
+	* config/nds32/constraints.md (Ufe): New memory constraint.
+	* config/nds32/nds32-md-auxiliary.c (nds32_mem_format,
+	nds32_output_16bit_load): Consider r8 register for lwi45.fe format.
+	* config/nds32/nds32.c (nds32_print_operand): Output lwi45.fe
+	operands.
+	* config/nds32/nds32.h (nds32_16bit_address_type): Add ADDRESS_R8_IMM7U.
+	* config/nds32/nds32.md (*mov<mode>): Adjust pattern.
+
 2018-04-05  Chung-Ju Wu  <jasonwucj@gmail.com>
 
 	* config/nds32/nds32.md: Use optimize_size in the condition for

gcc/config/nds32/constraints.md

@@ -296,6 +296,12 @@
        (match_test "(nds32_mem_format (op) == ADDRESS_REG)
 		    && (GET_MODE (op) == SImode)")))
 
+(define_memory_constraint "Ufe"
+  "Memory constraint for fe format"
+  (and (match_code "mem")
+       (match_test "nds32_mem_format (op) == ADDRESS_R8_IMM7U
+		    && (GET_MODE (op) == SImode)")))
+
 (define_memory_constraint "U37"
   "Memory constraint for 37 format"
   (and (match_code "mem")

gcc/config/nds32/nds32-md-auxiliary.c

@@ -925,6 +925,10 @@ nds32_mem_format (rtx op)
 	case E_SImode:
 	case E_SFmode:
 	case E_DFmode:
+	  /* r8 imply fe format.  */
+	  if ((regno == 8) &&
+	      (val >= -128 && val <= -4 && (val % 4 == 0)))
+	    return ADDRESS_R8_IMM7U;
 	  /* fp imply 37 format.  */
 	  if ((regno == FP_REGNUM) &&
 	      (val >= 0 && val < 512 && (val % 4 == 0)))
@@ -1009,6 +1013,9 @@ nds32_output_16bit_load (rtx *operands, int byte)
       snprintf (pattern, sizeof (pattern), "l%ci333.bi\t%%0, %%1", size);
       output_asm_insn (pattern, operands);
       break;
+    case ADDRESS_R8_IMM7U:
+      output_asm_insn ("lwi45.fe\t%0, %e1", operands);
+      break;
     case ADDRESS_FP_IMM7U:
       output_asm_insn ("lwi37\t%0, %1", operands);
       break;

gcc/config/nds32/nds32.c

@@ -2422,6 +2422,14 @@ nds32_print_operand (FILE *stream, rtx x, int code)
       /* No need to handle following process, so return immediately.  */
       return;
 
+    case 'e':
+      gcc_assert (MEM_P (x)
+		  && GET_CODE (XEXP (x, 0)) == PLUS
+		  && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT);
+      fprintf (stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (XEXP (XEXP (x, 0), 1)));
+
+      /* No need to handle following process, so return immediately.  */
+      return;
     case 'B':
       /* Use exact_log2() to search the 1-bit position.  */
       gcc_assert (CONST_INT_P (x));

gcc/config/nds32/nds32.h

@@ -113,6 +113,8 @@ enum nds32_16bit_address_type
   ADDRESS_LO_REG_IMM3U,
   /* post_inc [lo_reg + imm3u]: 333 format address.  */
   ADDRESS_POST_INC_LO_REG_IMM3U,
+  /* [$r8 + imm7u]: r8 imply address.  */
+  ADDRESS_R8_IMM7U,
   /* [$fp + imm7u]: fp imply address.  */
   ADDRESS_FP_IMM7U,
   /* [$sp + imm7u]: sp imply address.  */

gcc/config/nds32/nds32.md

@@ -193,8 +193,8 @@
 })
 
 (define_insn "*mov<mode>"
-  [(set (match_operand:QIHISI 0 "nonimmediate_operand" "=r, r, U45, U33, U37, U45, m,   l,   l,   l,   d, r,    d,    r,    r,    r")
-	(match_operand:QIHISI 1 "nds32_move_operand"   " r, r,   l,   l,   l,   d, r, U45, U33, U37, U45, m, Ip05, Is05, Is20, Ihig"))]
+  [(set (match_operand:QIHISI 0 "nonimmediate_operand" "=r, r, U45, U33, U37, U45, m,   l,   l,   l,   d,   d, r,    d,    r,    r,    r")
+	(match_operand:QIHISI 1 "nds32_move_operand"   " r, r,   l,   l,   l,   d, r, U45, U33, U37, U45, Ufe, m, Ip05, Is05, Is20, Ihig"))]
   "register_operand(operands[0], <MODE>mode)
    || register_operand(operands[1], <MODE>mode)"
 {
@@ -215,23 +215,24 @@
     case 8:
     case 9:
     case 10:
-      return nds32_output_16bit_load (operands, <byte>);
     case 11:
-      return nds32_output_32bit_load (operands, <byte>);
+      return nds32_output_16bit_load (operands, <byte>);
     case 12:
-      return "movpi45\t%0, %1";
+      return nds32_output_32bit_load (operands, <byte>);
     case 13:
-      return "movi55\t%0, %1";
+      return "movpi45\t%0, %1";
     case 14:
-      return "movi\t%0, %1";
+      return "movi55\t%0, %1";
     case 15:
+      return "movi\t%0, %1";
+    case 16:
       return "sethi\t%0, hi20(%1)";
     default:
       gcc_unreachable ();
     }
 }
-  [(set_attr "type"   "alu,alu,store,store,store,store,store,load,load,load,load,load,alu,alu,alu,alu")
-   (set_attr "length" "  2,  4,    2,    2,    2,    2,    4,   2,   2,   2,   2,   4,  2,  2,  4,  4")])
+  [(set_attr "type"   "alu,alu,store,store,store,store,store,load,load,load,load,load,load,alu,alu,alu,alu")
+   (set_attr "length" "  2,  4,    2,    2,    2,    2,    4,   2,   2,   2,   2,   2,   4,  2,  2,  4,  4")])
 
 
 ;; We use nds32_symbolic_operand to limit that only CONST/SYMBOL_REF/LABEL_REF