re PR rtl-optimization/90007 (ICE in extract_constrain_insn_cached, at recog.c:2223)

2019-11-27  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/90007
	* recog.c (constrain_operands): Permit hard registers too for
	memory when LRA is used.

2019-11-27  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/90007
	* gcc.target/i386/pr90007.c: New test.

From-SVN: r278770

gcc/ChangeLog

+2019-11-27  Vladimir Makarov  <vmakarov@redhat.com>
+
+	PR rtl-optimization/90007
+	* recog.c (constrain_operands): Permit hard registers too for
+	memory when LRA is used.
+
 2019-11-27  Bernd Schmidt  <bernds_cb1@t-online.de>
 
 	* config/m68k/m68k.c (m68k_output_compare_fp): Restore differences

gcc/recog.c

@@ -2740,10 +2740,9 @@ constrain_operands (int strict, alternative_mask alternatives)
 			       /* Before reload, accept what reload can turn
 				  into a mem.  */
 			       || (strict < 0 && CONSTANT_P (op))
-			       /* Before reload, accept a pseudo,
+			       /* Before reload, accept a pseudo or hard register,
 				  since LRA can turn it into a mem.  */
-			       || (strict < 0 && targetm.lra_p () && REG_P (op)
-				   && REGNO (op) >= FIRST_PSEUDO_REGISTER)
+			       || (strict < 0 && targetm.lra_p () && REG_P (op))
 			       /* During reload, accept a pseudo  */
 			       || (reload_in_progress && REG_P (op)
 				   && REGNO (op) >= FIRST_PSEUDO_REGISTER)))

gcc/testsuite/ChangeLog

+2019-11-27  Vladimir Makarov  <vmakarov@redhat.com>
+
+	PR rtl-optimization/90007
+	* gcc.target/i386/pr90007.c: New test.
+
 2019-11-27  Andrew Sutton  <asutton@lock3software.com>
 
 	Emit hard errors for certain satisfaction errors.

gcc/testsuite/gcc.target/i386/pr90007.c

+/* PR rtl-optimization/90007 */
+/* { dg-do compile { target x86_64-*-* } } */
+/* { dg-options "-march=bdver1 -mfpmath=387 -O1 -fschedule-insns -fselective-scheduling" } */
+
+void
+qj (int b9, int r9, int k4, int k0, int e7)
+{
+  (void) b9;
+  (void) r9;
+  (void) k4;
+
+  while (!!k0 == e7 * 1.1)
+    {
+    }
+}