Commit 85bb7f7f by Evandro Menezes Committed by Sebastian Pop

add option for the Samsung Exynos M1 core for AArch64

	* doc/invoke.texi (AARCH64/mtune): Add exynos-m1 as an option.
	* config/aarch64/aarch64-cores.def (exynos-m1): New core.
	* config/aarch64/aarch64-tune.md: Regenerate.

From-SVN: r221884
parent e278ae6f
2015-04-06 Evandro Menezes <e.menezes@samsung.com> 2015-04-06 Evandro Menezes <e.menezes@samsung.com>
* doc/invoke.texi (AARCH64/mtune): Add exynos-m1 as an option.
* config/aarch64/aarch64-cores.def (exynos-m1): New core.
* config/aarch64/aarch64-tune.md: Regenerate.
2015-04-06 Evandro Menezes <e.menezes@samsung.com>
* doc/invoke.texi (ARM/mtune): Add "exynos-m1" as an option. * doc/invoke.texi (ARM/mtune): Add "exynos-m1" as an option.
* config/arm/arm.c (arm_issue_rate): Specify "3" for "exynosm1". * config/arm/arm.c (arm_issue_rate): Specify "3" for "exynosm1".
* config/arm/arm-cores.def (exynos-m1): New core. * config/arm/arm-cores.def (exynos-m1): New core.
......
...@@ -37,6 +37,7 @@ ...@@ -37,6 +37,7 @@
AARCH64_CORE("cortex-a53", cortexa53, cortexa53, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa53) AARCH64_CORE("cortex-a53", cortexa53, cortexa53, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa53)
AARCH64_CORE("cortex-a57", cortexa57, cortexa57, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57) AARCH64_CORE("cortex-a57", cortexa57, cortexa57, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57)
AARCH64_CORE("cortex-a72", cortexa72, cortexa57, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57) AARCH64_CORE("cortex-a72", cortexa72, cortexa57, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57)
AARCH64_CORE("exynos-m1", exynosm1, cortexa57, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa57)
AARCH64_CORE("thunderx", thunderx, thunderx, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx) AARCH64_CORE("thunderx", thunderx, thunderx, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx)
AARCH64_CORE("xgene1", xgene1, xgene1, 8, AARCH64_FL_FOR_ARCH8, xgene1) AARCH64_CORE("xgene1", xgene1, xgene1, 8, AARCH64_FL_FOR_ARCH8, xgene1)
......
;; -*- buffer-read-only: t -*- ;; -*- buffer-read-only: t -*-
;; Generated automatically by gentune.sh from aarch64-cores.def ;; Generated automatically by gentune.sh from aarch64-cores.def
(define_attr "tune" (define_attr "tune"
"cortexa53,cortexa57,cortexa72,thunderx,xgene1,cortexa57cortexa53,cortexa72cortexa53" "cortexa53,cortexa57,cortexa72,exynosm1,thunderx,xgene1,cortexa57cortexa53,cortexa72cortexa53"
(const (symbol_ref "((enum attr_tune) aarch64_tune)"))) (const (symbol_ref "((enum attr_tune) aarch64_tune)")))
...@@ -12335,8 +12335,8 @@ architecture. ...@@ -12335,8 +12335,8 @@ architecture.
@opindex mtune @opindex mtune
Specify the name of the target processor for which GCC should tune the Specify the name of the target processor for which GCC should tune the
performance of the code. Permissible values for this option are: performance of the code. Permissible values for this option are:
@samp{generic}, @samp{cortex-a53}, @samp{cortex-a57}, @samp{generic}, @samp{cortex-a53}, @samp{cortex-a57}, @samp{cortex-a72},
@samp{cortex-a72}, @samp{thunderx}, @samp{xgene1}. @samp{exynos-m1}, @samp{thunderx}, @samp{xgene1}.
Additionally, this option can specify that GCC should tune the performance Additionally, this option can specify that GCC should tune the performance
of the code for a big.LITTLE system. Permissible values for this of the code for a big.LITTLE system. Permissible values for this
......
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