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riscv-gcc-1
Commit 85845bb9 by Uros Bizjak Committed by Uros Bizjak
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i386.md (mov<mode>cc): Macroize expander from movsfcc... 

	* config/i386/i386.md (mov<mode>cc): Macroize expander from movsfcc,
	movdfcc and movxfcc using X87MODEF mode iterator and SSE_FLOAT_MODE_P
	as insn constraint.
	* config/i386/sse.md (<sse>_movup<ssemodesuffixf2c>): Macroize insn
	from sse_movups adn sse2_movupd using SSEMODEF2P mode iterator and
	SSE_VEC_FLOAT_MODE_P as insn constraint.
	(<sse>_movmskp<ssemodesuffixf2c>): Ditto from similar patterns.
	(sse4a_movnt<mode>): Macroize insn from sse4a_movntsf and
	sse4a_movntdf using MODEF mode iterator.
	(sse4a_vmmovnt<mode>): Macroize insn form sse4a_vmmovntv2df and
	sse4a_vmmovntv4sf using SSEMODEF2P mode iterator.
	(sse4_1_blendp<ssemodesuffixf2c>): Ditto from similar patterns.
	(sse4_1_blendvp<ssemodesuffixf2c>): Ditto.
	(sse4_1_dpp<ssemodesuffixf2c>): Ditto.
	(sse4_1_roundp<ssemodesuffixf2c>): Ditto.
	(sse4_1_rounds<ssemodesuffixf2c>): Ditto.

From-SVN: r132518
parent dedd42d5
Showing with 36 additions and 31 deletions
gcc/ChangeLog
2008-02-21 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (mov<mode>cc): Macroize expander from movsfcc,
movdfcc and movxfcc using X87MODEF mode iterator and SSE_FLOAT_MODE_P
as insn constraint.
* config/i386/sse.md (<sse>_movup<ssemodesuffixf2c>): Macroize insn
from sse_movups adn sse2_movupd using SSEMODEF2P mode iterator and
SSE_VEC_FLOAT_MODE_P as insn constraint.
(<sse>_movmskp<ssemodesuffixf2c>): Ditto from similar patterns.
(sse4a_movnt<mode>): Macroize insn from sse4a_movntsf and
sse4a_movntdf using MODEF mode iterator.
(sse4a_vmmovnt<mode>): Macroize insn form sse4a_vmmovntv2df and
sse4a_vmmovntv4sf using SSEMODEF2P mode iterator.
(sse4_1_blendp<ssemodesuffixf2c>): Ditto from similar patterns.
(sse4_1_blendvp<ssemodesuffixf2c>): Ditto.
(sse4_1_dpp<ssemodesuffixf2c>): Ditto.
(sse4_1_roundp<ssemodesuffixf2c>): Ditto.
(sse4_1_rounds<ssemodesuffixf2c>): Ditto.
2008-02-21 Richard Guenther <rguenther@suse.de> 2008-02-21 Richard Guenther <rguenther@suse.de>
* tree.def (PAREN_EXPR): New tree code. * tree.def (PAREN_EXPR): New tree code.
......
gcc/config/i386/i386.md
...@@ -19373,7 +19373,7 @@ ...@@ -19373,7 +19373,7 @@
(match_operand:DI 2 "general_operand" "") (match_operand:DI 2 "general_operand" "")
(match_operand:DI 3 "general_operand" "")))] (match_operand:DI 3 "general_operand" "")))]
"TARGET_64BIT" "TARGET_64BIT"
"if (!ix86_expand_int_movcc (operands)) FAIL; DONE;") "if (ix86_expand_int_movcc (operands)) DONE; else FAIL;")
(define_insn "x86_movdicc_0_m1_rex64" (define_insn "x86_movdicc_0_m1_rex64"
[(set (match_operand:DI 0 "register_operand" "=r") [(set (match_operand:DI 0 "register_operand" "=r")
...@@ -19427,7 +19427,7 @@ ...@@ -19427,7 +19427,7 @@
(match_operand:SI 2 "general_operand" "") (match_operand:SI 2 "general_operand" "")
(match_operand:SI 3 "general_operand" "")))] (match_operand:SI 3 "general_operand" "")))]
"" ""
"if (!ix86_expand_int_movcc (operands)) FAIL; DONE;") "if (ix86_expand_int_movcc (operands)) DONE; else FAIL;")
;; Data flow gets confused by our desire for `sbbl reg,reg', and clearing ;; Data flow gets confused by our desire for `sbbl reg,reg', and clearing
;; the register first winds up with `sbbl $0,reg', which is also weird. ;; the register first winds up with `sbbl $0,reg', which is also weird.
...@@ -19485,7 +19485,7 @@ ...@@ -19485,7 +19485,7 @@
(match_operand:HI 2 "general_operand" "") (match_operand:HI 2 "general_operand" "")
(match_operand:HI 3 "general_operand" "")))] (match_operand:HI 3 "general_operand" "")))]
"TARGET_HIMODE_MATH" "TARGET_HIMODE_MATH"
"if (!ix86_expand_int_movcc (operands)) FAIL; DONE;") "if (ix86_expand_int_movcc (operands)) DONE; else FAIL;")
(define_insn "*movhicc_noc" (define_insn "*movhicc_noc"
[(set (match_operand:HI 0 "register_operand" "=r,r") [(set (match_operand:HI 0 "register_operand" "=r,r")
...@@ -19507,7 +19507,7 @@ ...@@ -19507,7 +19507,7 @@
(match_operand:QI 2 "general_operand" "") (match_operand:QI 2 "general_operand" "")
(match_operand:QI 3 "general_operand" "")))] (match_operand:QI 3 "general_operand" "")))]
"TARGET_QIMODE_MATH" "TARGET_QIMODE_MATH"
"if (!ix86_expand_int_movcc (operands)) FAIL; DONE;") "if (ix86_expand_int_movcc (operands)) DONE; else FAIL;")
(define_insn_and_split "*movqicc_noc" (define_insn_and_split "*movqicc_noc"
[(set (match_operand:QI 0 "register_operand" "=r,r") [(set (match_operand:QI 0 "register_operand" "=r,r")
...@@ -19529,13 +19529,15 @@ ...@@ -19529,13 +19529,15 @@
[(set_attr "type" "icmov") [(set_attr "type" "icmov")
(set_attr "mode" "SI")]) (set_attr "mode" "SI")])
(define_expand "movsfcc" (define_expand "mov<mode>cc"
[(set (match_operand:SF 0 "register_operand" "") [(set (match_operand:X87MODEF 0 "register_operand" "")
(if_then_else:SF (match_operand 1 "comparison_operator" "") (if_then_else:X87MODEF
(match_operand:SF 2 "register_operand" "") (match_operand 1 "comparison_operator" "")
(match_operand:SF 3 "register_operand" "")))] (match_operand:X87MODEF 2 "register_operand" "")
"(TARGET_80387 && TARGET_CMOVE) || TARGET_SSE_MATH" (match_operand:X87MODEF 3 "register_operand" "")))]
"if (! ix86_expand_fp_movcc (operands)) FAIL; DONE;") "(TARGET_80387 && TARGET_CMOVE)
|| (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)"
"if (ix86_expand_fp_movcc (operands)) DONE; else FAIL;")
(define_insn "*movsfcc_1_387" (define_insn "*movsfcc_1_387"
[(set (match_operand:SF 0 "register_operand" "=f,f,r,r") [(set (match_operand:SF 0 "register_operand" "=f,f,r,r")
...@@ -19553,14 +19555,6 @@ ...@@ -19553,14 +19555,6 @@
[(set_attr "type" "fcmov,fcmov,icmov,icmov") [(set_attr "type" "fcmov,fcmov,icmov,icmov")
(set_attr "mode" "SF,SF,SI,SI")]) (set_attr "mode" "SF,SF,SI,SI")])
(define_expand "movdfcc"
[(set (match_operand:DF 0 "register_operand" "")
(if_then_else:DF (match_operand 1 "comparison_operator" "")
(match_operand:DF 2 "register_operand" "")
(match_operand:DF 3 "register_operand" "")))]
"(TARGET_80387 && TARGET_CMOVE) || (TARGET_SSE2 && TARGET_SSE_MATH)"
"if (! ix86_expand_fp_movcc (operands)) FAIL; DONE;")
(define_insn "*movdfcc_1" (define_insn "*movdfcc_1"
[(set (match_operand:DF 0 "register_operand" "=f,f,&r,&r") [(set (match_operand:DF 0 "register_operand" "=f,f,&r,&r")
(if_then_else:DF (match_operator 1 "fcmov_comparison_operator" (if_then_else:DF (match_operator 1 "fcmov_comparison_operator"
...@@ -19613,14 +19607,6 @@ ...@@ -19613,14 +19607,6 @@
split_di (operands+3, 1, operands+7, operands+8); split_di (operands+3, 1, operands+7, operands+8);
split_di (operands, 1, operands+2, operands+3);") split_di (operands, 1, operands+2, operands+3);")
(define_expand "movxfcc"
[(set (match_operand:XF 0 "register_operand" "")
(if_then_else:XF (match_operand 1 "comparison_operator" "")
(match_operand:XF 2 "register_operand" "")
(match_operand:XF 3 "register_operand" "")))]
"TARGET_80387 && TARGET_CMOVE"
"if (! ix86_expand_fp_movcc (operands)) FAIL; DONE;")
(define_insn "*movxfcc_1" (define_insn "*movxfcc_1"
[(set (match_operand:XF 0 "register_operand" "=f,f") [(set (match_operand:XF 0 "register_operand" "=f,f")
(if_then_else:XF (match_operator 1 "fcmov_comparison_operator" (if_then_else:XF (match_operator 1 "fcmov_comparison_operator"
...@@ -19734,7 +19720,7 @@ ...@@ -19734,7 +19720,7 @@
(match_operand:QI 2 "register_operand" "") (match_operand:QI 2 "register_operand" "")
(match_operand:QI 3 "const_int_operand" "")] (match_operand:QI 3 "const_int_operand" "")]
"" ""
"if (!ix86_expand_int_addcc (operands)) FAIL; DONE;") "if (ix86_expand_int_addcc (operands)) DONE; else FAIL;")
(define_expand "addhicc" (define_expand "addhicc"
[(match_operand:HI 0 "register_operand" "") [(match_operand:HI 0 "register_operand" "")
...@@ -19742,7 +19728,7 @@ ...@@ -19742,7 +19728,7 @@
(match_operand:HI 2 "register_operand" "") (match_operand:HI 2 "register_operand" "")
(match_operand:HI 3 "const_int_operand" "")] (match_operand:HI 3 "const_int_operand" "")]
"" ""
"if (!ix86_expand_int_addcc (operands)) FAIL; DONE;") "if (ix86_expand_int_addcc (operands)) DONE; else FAIL;")
(define_expand "addsicc" (define_expand "addsicc"
[(match_operand:SI 0 "register_operand" "") [(match_operand:SI 0 "register_operand" "")
...@@ -19750,7 +19736,7 @@ ...@@ -19750,7 +19736,7 @@
(match_operand:SI 2 "register_operand" "") (match_operand:SI 2 "register_operand" "")
(match_operand:SI 3 "const_int_operand" "")] (match_operand:SI 3 "const_int_operand" "")]
"" ""
"if (!ix86_expand_int_addcc (operands)) FAIL; DONE;") "if (ix86_expand_int_addcc (operands)) DONE; else FAIL;")
(define_expand "adddicc" (define_expand "adddicc"
[(match_operand:DI 0 "register_operand" "") [(match_operand:DI 0 "register_operand" "")
...@@ -19758,7 +19744,7 @@ ...@@ -19758,7 +19744,7 @@
(match_operand:DI 2 "register_operand" "") (match_operand:DI 2 "register_operand" "")
(match_operand:DI 3 "const_int_operand" "")] (match_operand:DI 3 "const_int_operand" "")]
"TARGET_64BIT" "TARGET_64BIT"
"if (!ix86_expand_int_addcc (operands)) FAIL; DONE;") "if (ix86_expand_int_addcc (operands)) DONE; else FAIL;")
;; Misc patterns (?) ;; Misc patterns (?)
......
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