i386.md (any_div): New code iterator.

	* config/i386/i386.md (any_div): New code iterator.
	(u): Handle div and udiv.
	(sgnprefix): Ditto.
	(<u>divqi3): Macroize insn from divqi3 and udivqi using and_div
	code iterator.
	(lfloor<MODEF:mode><SWI48:mode>2): Macroize insn from
	lfloor<mode>{si,di}2 patterns using SWI48 mode iterator.
	(lceil<MODEF:mode><SWI48:mode>2): Macroize insn from
	lceil<mode>{si,di}2 patterns using SWI48 mode iterator.

From-SVN: r152584

gcc/config/i386/i386.md

@@ -705,12 +705,17 @@
 ;; Used in signed and unsigned widening multiplications.
 (define_code_iterator any_extend [sign_extend zero_extend])
 
-;; Various insn prefixes for widening operations.
-(define_code_attr u [(sign_extend "") (zero_extend "u")])
+;; Used in signed and unsigned divisions.
+(define_code_iterator any_div [div udiv])
+
+;; Various insn prefixes for signed and unsigned operations.
+(define_code_attr u [(sign_extend "") (zero_extend "u")
+		     (div "") (udiv "u")])
 (define_code_attr s [(sign_extend "s") (zero_extend "u")])
 
-;; Instruction prefix for widening operations.
-(define_code_attr sgnprefix [(sign_extend "i") (zero_extend "")])
+;; Instruction prefix for signed and unsigned operations.
+(define_code_attr sgnprefix [(sign_extend "i") (zero_extend "")
+			     (div "i") (udiv "")])
 
 ;; All single word integer modes.
 (define_mode_iterator SWI [QI HI SI (DI "TARGET_64BIT")])
@@ -8127,23 +8132,14 @@
 
 ;; Divide instructions
 
-(define_insn "divqi3"
-  [(set (match_operand:QI 0 "register_operand" "=a")
-	(div:QI (match_operand:HI 1 "register_operand" "0")
-		(match_operand:QI 2 "nonimmediate_operand" "qm")))
-   (clobber (reg:CC FLAGS_REG))]
-  "TARGET_QIMODE_MATH"
-  "idiv{b}\t%2"
-  [(set_attr "type" "idiv")
-   (set_attr "mode" "QI")])
-
-(define_insn "udivqi3"
+(define_insn "<u>divqi3"
   [(set (match_operand:QI 0 "register_operand" "=a")
-	(udiv:QI (match_operand:HI 1 "register_operand" "0")
-		 (match_operand:QI 2 "nonimmediate_operand" "qm")))
+	(any_div:QI
+	  (match_operand:HI 1 "register_operand" "0")
+	  (match_operand:QI 2 "nonimmediate_operand" "qm")))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_QIMODE_MATH"
-  "div{b}\t%2"
+  "<sgnprefix>div{b}\t%2"
   [(set_attr "type" "idiv")
    (set_attr "mode" "QI")])
 
@@ -17999,25 +17995,13 @@
    && flag_unsafe_math_optimizations"
   "")
 
-(define_expand "lfloor<mode>di2"
-  [(match_operand:DI 0 "nonimmediate_operand" "")
-   (match_operand:MODEF 1 "register_operand" "")]
-  "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH && TARGET_64BIT
-   && !flag_trapping_math"
-{
-  if (optimize_insn_for_size_p ())
-    FAIL;
-  ix86_expand_lfloorceil (operand0, operand1, true);
-  DONE;
-})
-
-(define_expand "lfloor<mode>si2"
-  [(match_operand:SI 0 "nonimmediate_operand" "")
+(define_expand "lfloor<MODEF:mode><SWI48:mode>2"
+  [(match_operand:SWI48 0 "nonimmediate_operand" "")
    (match_operand:MODEF 1 "register_operand" "")]
-  "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
+  "SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH
    && !flag_trapping_math"
 {
-  if (optimize_insn_for_size_p () && TARGET_64BIT)
+  if (TARGET_64BIT && optimize_insn_for_size_p ())
     FAIL;
   ix86_expand_lfloorceil (operand0, operand1, true);
   DONE;
@@ -18273,20 +18257,10 @@
    && flag_unsafe_math_optimizations"
   "")
 
-(define_expand "lceil<mode>di2"
-  [(match_operand:DI 0 "nonimmediate_operand" "")
-   (match_operand:MODEF 1 "register_operand" "")]
-  "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH && TARGET_64BIT
-   && !flag_trapping_math"
-{
-  ix86_expand_lfloorceil (operand0, operand1, false);
-  DONE;
-})
-
-(define_expand "lceil<mode>si2"
-  [(match_operand:SI 0 "nonimmediate_operand" "")
+(define_expand "lceil<MODEF:mode><SWI48:mode>2"
+  [(match_operand:SWI48 0 "nonimmediate_operand" "")
    (match_operand:MODEF 1 "register_operand" "")]
-  "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
+  "SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH
    && !flag_trapping_math"
 {
   ix86_expand_lfloorceil (operand0, operand1, false);