re PR target/87807 (passing float/double vectors as variadic args fails on-64bit SPARC)

	PR target/87807
	* config/sparc/sparc-modes.def: Minor tweak.
	* config/sparc/sparc.c: Minor reordering.
	(sparc_pass_by_reference): Move around.
	(traverse_record_type): Change offset from HOST_WIDE_INT to int.
	(classify_registers): Likewise for bitpos.
	(function_arg_slotno): Remove dead test and tweak comments.
	<MODE_RANDOM>: Remove useless assertion and test whether the
	parameter is named in order to pass it in FP registers.  Return
	the regno for floating-point vector types.
	(compute_int_layout): Change bitpos from HOST_WIDE_INT to int.
	(compute_fp_layout): Likewise.
	(count_registers): Likewise.
	(assign_int_registers): Likewise.
	(assign_fp_registers): Likewise.
	(assign_registers): Likewise.
	(function_arg_record_value): Change size from HOST_WIDE_INT to int
	and use CEIL_NWORDS to compute the number of registers.
	(function_arg_union_value): Minor tweaks.
	(function_arg_vector_value): Add slotno and named parameters, use
	CEIL_NWORDS to compute the number of registers.
	(sparc_function_arg_1): Rework handling of vector types.  Change
	size from HOST_WIDE_INT to int.
	(sparc_arg_partial_bytes): Rework handling of 32-bit ABI and deal
	with vector types for the 64-bt ABI.
	(sparc_function_arg_advance): Likewise.
	(sparc_return_in_memory): Add reference to -fpcc-struct-return.
	(sparc_struct_value_rtx): Return NULL_RTX instead of 0.
	(sparc_function_value_1): Rework handling of vector types.  Change
	size from HOST_WIDE_INT to int.

From-SVN: r266651

gcc/ChangeLog

+2018-11-29  Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR target/87807
+	* config/sparc/sparc-modes.def: Minor tweak.
+	* config/sparc/sparc.c: Minor reordering.
+	(sparc_pass_by_reference): Move around.
+	(traverse_record_type): Change offset from HOST_WIDE_INT to int.
+	(classify_registers): Likewise for bitpos.
+	(function_arg_slotno): Remove dead test and tweak comments.
+	<MODE_RANDOM>: Remove useless assertion and test whether the
+	parameter is named in order to pass it in FP registers.  Return
+	the regno for floating-point vector types.
+	(compute_int_layout): Change bitpos from HOST_WIDE_INT to int.
+	(compute_fp_layout): Likewise.
+	(count_registers): Likewise.
+	(assign_int_registers): Likewise.
+	(assign_fp_registers): Likewise.
+	(assign_registers): Likewise.
+	(function_arg_record_value): Change size from HOST_WIDE_INT to int
+	and use CEIL_NWORDS to compute the number of registers.
+	(function_arg_union_value): Minor tweaks.
+	(function_arg_vector_value): Add slotno and named parameters, use
+	CEIL_NWORDS to compute the number of registers.
+	(sparc_function_arg_1): Rework handling of vector types.  Change
+	size from HOST_WIDE_INT to int.
+	(sparc_arg_partial_bytes): Rework handling of 32-bit ABI and deal
+	with vector types for the 64-bt ABI.
+	(sparc_function_arg_advance): Likewise.
+	(sparc_return_in_memory): Add reference to -fpcc-struct-return.
+	(sparc_struct_value_rtx): Return NULL_RTX instead of 0.
+	(sparc_function_value_1): Rework handling of vector types.  Change
+	size from HOST_WIDE_INT to int.
+
 2018-11-29  Jakub Jelinek  <jakub@redhat.com>
 
 	PR target/88152

gcc/config/sparc/sparc-modes.def

@@ -56,8 +56,8 @@ CC_MODE (CCFP);
 CC_MODE (CCFPE);
 
 /* Vector modes.  */
-VECTOR_MODES (INT, 16);       /* V16QI V8HI V4SI V2DI */
-VECTOR_MODES (INT, 8);        /*       V8QI V4HI V2SI */
-VECTOR_MODES (INT, 4);        /*       V4QI V2HI      */
-VECTOR_MODE (INT, DI, 1);     /*                 V1DI */
-VECTOR_MODE (INT, SI, 1);     /*                 V1SI */
+VECTOR_MODES (INT, 16);       /* V16QI V8HI V4SI V2DI      */
+VECTOR_MODES (INT, 8);        /*       V8QI V4HI V2SI      */
+VECTOR_MODES (INT, 4);        /*            V4QI V2HI      */
+VECTOR_MODE (INT, DI, 1);     /*                      V1DI */
+VECTOR_MODE (INT, SI, 1);     /*                      V1SI */

gcc/testsuite/ChangeLog

+2018-11-29  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gcc.target/sparc/20181129-1.c: New test.
+	* gcc.target/sparc/20181129-2.c: Likewise.
+
 2018-11-29  Jakub Jelinek  <jakub@redhat.com>
 
 	PR target/88152

gcc/testsuite/gcc.target/sparc/20181129-1.c

+/* PR target/87807 */
+/* Reported by Rainer Orth <ro@gcc.gnu.org> */
+
+/* { dg-do run } */
+
+#include <stdarg.h>
+
+typedef float __attribute__ ((vector_size (8))) vector_float;
+
+vector_float v2sf = { 1.0f, 2.0f };
+
+void
+f (vector_float a, ...)
+{
+  va_list argp;
+  va_start (argp, a);
+  vector_float x = va_arg (argp, vector_float);
+  if (x[0] != a[0] || x[1] != a[1])
+    __builtin_abort ();
+  va_end (argp);
+}
+
+int
+main (void)
+{
+  f (v2sf, v2sf);
+  return 0;
+} 

gcc/testsuite/gcc.target/sparc/20181129-2.c

+/* PR target/87807 */
+/* Reported by Rainer Orth <ro@gcc.gnu.org> */
+
+/* { dg-do run } */
+
+#include <stdarg.h>
+
+typedef double __attribute__ ((vector_size (16))) vector_double;
+
+vector_double v2df = { 1.0, 2.0 };
+
+void
+f (vector_double a, ...)
+{
+  va_list argp;
+  va_start (argp, a);
+  vector_double x = va_arg (argp, vector_double);
+  if (x[0] != a[0] || x[1] != a[1])
+    __builtin_abort ();
+  va_end (argp);
+}
+
+int
+main (void)
+{
+  f (v2df, v2df);
+  return 0;
+}