re PR target/69706 (internal compiler error: in extract_constrain_insn, at recog.c:2246)

	PR target/69706
	* config/sparc/sparc.c (ROUND_ADVANCE): Rename to...
	(NWORDS_UP): ...this
	(init_cumulative_args): Minor tweaks.
	(sparc_promote_function_mode): Likewise.
	(scan_record_type): Delete.
	(traverse_record_type): New function template.
	(classify_data_t): New structure type.
	(classify_registers): New inline function.
	(function_arg_slotno): In 64-bit mode, bail out early if FP slots are
	exhausted.  Instantiate traverse_record_type on classify_registers and
	deal with the case of a structure passed in slot #15 with no FP field
	in the first word.
	(assign_data_t): New structure type.
	(compute_int_layout): New static function.
	(compute_fp_layout): Likewise.
	(count_registers): New inline function.
	(assign_int_registers): New static function.
	(assign_fp_registers): Likewise.
	(assign_registers): New inline function.
	(function_arg_record_value_1): Delete.
	(function_arg_record_value_2): Likewise.
	(function_arg_record_value_3): Likewise.
	(function_arg_record_value): Adjust to above changes.  Instantiate
	traverse_record_type on count_registers to first count the number of
	registers to be used and then on assign_registers to assign them.
	(function_arg_union_value): Adjust to above renaming.
	(sparc_function_arg_1); Minor tweaks.  Remove commented out code.
	(sparc_arg_partial_bytes): Adjust to above renaming.  Deal with the
	case of a structure passed in slot #15
	(sparc_function_arg_advance): Likewise.
	(function_arg_padding): Minor tweak.

From-SVN: r233808

gcc/ChangeLog

+2016-02-29  Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR target/69706
+	* config/sparc/sparc.c (ROUND_ADVANCE): Rename to...
+	(NWORDS_UP): ...this
+	(init_cumulative_args): Minor tweaks.
+	(sparc_promote_function_mode): Likewise.
+	(scan_record_type): Delete.
+	(traverse_record_type): New function template.
+	(classify_data_t): New structure type.
+	(classify_registers): New inline function.
+	(function_arg_slotno): In 64-bit mode, bail out early if FP slots are
+	exhausted.  Instantiate traverse_record_type on classify_registers and
+	deal with the case of a structure passed in slot #15 with no FP field
+	in the first word.
+	(assign_data_t): New structure type.
+	(compute_int_layout): New static function.
+	(compute_fp_layout): Likewise.
+	(count_registers): New inline function.
+	(assign_int_registers): New static function.
+	(assign_fp_registers): Likewise.
+	(assign_registers): New inline function.
+	(function_arg_record_value_1): Delete.
+	(function_arg_record_value_2): Likewise.
+	(function_arg_record_value_3): Likewise.
+	(function_arg_record_value): Adjust to above changes.  Instantiate
+	traverse_record_type on count_registers to first count the number of
+	registers to be used and then on assign_registers to assign them.
+	(function_arg_union_value): Adjust to above renaming.
+	(sparc_function_arg_1); Minor tweaks.  Remove commented out code.
+	(sparc_arg_partial_bytes): Adjust to above renaming.  Deal with the
+	case of a structure passed in slot #15
+	(sparc_function_arg_advance): Likewise.
+	(function_arg_padding): Minor tweak.
+
 2016-02-29  Richard Biener  <rguenther@suse.de>
 
 	PR tree-optimization/69720

gcc/testsuite/ChangeLog

 2016-02-29  Eric Botcazou  <ebotcazou@adacore.com>
 
+	* gcc.target/sparc/20160229-1.c: New test.
+
+2016-02-29  Eric Botcazou  <ebotcazou@adacore.com>
+
 	* gnat.dg/stack_usage3.adb: New test.
 	* gnat.dg/stack_usage3_pkg.ads: New helper.
 

gcc/testsuite/gcc.target/sparc/20160229-1.c

+/* PR target/69706 */
+/* Reported by John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> */
+
+/* { dg-do run } */
+/* { dg-options "-std=gnu99" }
+/* { dg-require-effective-target lp64 } */
+
+extern void abort (void);
+
+
+/* Pass a 12-byte structure partially in slot #15 and on the stack.  */
+
+struct t_rgb { float r, g, b; };
+
+void write_xpm (void *out, unsigned int flags, const char *title, 
+	        const char *legend, const char *label_x, const char *label_y,
+	        int n_x, int n_y, float axis_x[], float axis_y[], float *mat[],
+	        float lo, float hi, struct t_rgb rlo, struct t_rgb rhi)
+{
+  register float f30 asm ("f30");
+  register float f31 asm ("f31");
+
+  if (f30 != 1.0f)
+    abort ();
+
+  if (f31 != 2.0f)
+    abort ();
+
+  if (rhi.r != 1.0f)
+    abort ();
+
+  if (rhi.g != 2.0f)
+    abort ();
+
+  if (rhi.b != 3.0f)
+    abort ();
+}
+
+
+/* Pass a 16-byte structure partially in slot #15 and on the stack.  */
+
+struct S1 { _Complex float f1; _Complex float f2; };
+
+void f1 (int p1, int p2, int p3, int p4, int p5, int p6, int p7, int p8,
+	 int p9, int p10, int p11, int p12, int p13, int p14, int p15,
+	 struct S1 s1)
+{
+  register float f30 asm ("f30");
+  register float f31 asm ("f31");
+
+  if (f30 != 4.0f)
+    abort ();
+
+  if (f31 != 5.0f)
+    abort ();
+
+  if (__real__ s1.f1 != 4.0f)
+    abort ();
+
+  if (__imag__ s1.f1 != 5.0f)
+    abort ();
+
+  if (__real__ s1.f2 != 6.0f)
+    abort ();
+
+  if (__imag__ s1.f2 != 7.0f)
+    abort ();
+}
+
+
+/* Pass a 16-byte structure partially in slot #15 and on the stack.  */
+
+struct S2 { double d1; double d2; };
+
+void f2 (int p1, int p2, int p3, int p4, int p5, int p6, int p7, int p8,
+	 int p9, int p10, int p11, int p12, int p13, int p14, int p15,
+	 struct S2 s2)
+{
+  register double d30 asm ("f30");
+
+  if (d30 != 1.0)
+    abort ();
+
+  if (s2.d1 != 1.0)
+    abort ();
+
+  if (s2.d2 != 2.0)
+    abort ();
+}
+
+
+/* Pass a 16-byte structure partially in slot #15 and on the stack.  */
+
+struct S3 { _Complex double d; };
+
+void f3 (int p1, int p2, int p3, int p4, int p5, int p6, int p7, int p8,
+	 int p9, int p10, int p11, int p12, int p13, int p14, int p15,
+	 struct S3 s3)
+{
+  register double d30 asm ("f30");
+
+  if (d30 != 3.0)
+    abort ();
+
+  if (__real__ s3.d != 3.0)
+    abort ();
+
+  if (__imag__ s3.d != 4.0)
+    abort ();
+}
+
+
+/* Pass a 16-byte structure entirely on the stack.  */
+
+struct S4 { long l; double d; };
+
+void f4 (int p1, int p2, int p3, int p4, int p5, int p6, int p7, int p8,
+	 int p9, int p10, int p11, int p12, int p13, int p14, int p15,
+	 struct S4 s4)
+{
+  if (s4.l != 5)
+    abort ();
+
+  if (s4.d != 6.0)
+    abort ();
+}
+
+
+#define PI 3.141592654
+
+int main (void)
+{
+  struct t_rgb lo = { -1.0f, -2.0f, -3.0f };
+  struct t_rgb hi = { 1.0f, 2.0f, 3.0f };
+  float arrf[1];
+  float *arrp[1];
+  struct S1 s1 = { 4.0f + 5.0fi, 6.0f + 7.0fi };
+  struct S2 s2 = { 1.0, 2.0 };
+  struct S3 s3 = { 3.0 + 4.0i };
+  struct S4 s4 = { 5, 6.0 };
+  register double d32 asm ("f32") = PI;
+
+  write_xpm (0, 0, "", "", "", "", 0, 0, arrf, arrf, arrp, 0.0f, 0.0f, lo, hi);
+
+  f1 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, s1);
+
+  f2 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, s2);
+
+  f3 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, s3);
+
+  f4 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, s4);
+
+  if (d32 != PI)
+    abort ();
+
+  return 0;
+}