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Commit 84c8a10b by Christophe Lyon Committed by Christophe Lyon
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[ARM/AArch64][testsuite] Add vmla and vmls tests. 

2015-01-20  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.target/aarch64/advsimd-intrinsics/vmlX.inc: New file.
	* gcc.target/aarch64/advsimd-intrinsics/vmla.c: New file.
	* gcc.target/aarch64/advsimd-intrinsics/vmls.c: New file.

From-SVN: r219917
parent 2d8536f6
Showing with 201 additions and 0 deletions
gcc/testsuite/ChangeLog
2015-01-20 Christophe Lyon <christophe.lyon@linaro.org> 2015-01-20 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vmlX.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmla.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmls.c: New file.
2015-01-20 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vldX_dup.c: New file. * gcc.target/aarch64/advsimd-intrinsics/vldX_dup.c: New file.
2015-01-20 Jakub Jelinek <jakub@redhat.com> 2015-01-20 Jakub Jelinek <jakub@redhat.com>
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlX.inc 0 → 100644
#define FNNAME1(NAME) exec_ ## NAME
#define FNNAME(NAME) FNNAME1(NAME)
void FNNAME (INSN_NAME) (void)
{
#define DECL_VMLX(T, W, N) \
DECL_VARIABLE(vector1, T, W, N); \
DECL_VARIABLE(vector2, T, W, N); \
DECL_VARIABLE(vector3, T, W, N); \
DECL_VARIABLE(vector_res, T, W, N)
/* vector_res = vmla(vector, vector3, vector4),
then store the result. */
#define TEST_VMLX1(INSN, Q, T1, T2, W, N) \
VECT_VAR(vector_res, T1, W, N) = \
INSN##Q##_##T2##W(VECT_VAR(vector1, T1, W, N), \
VECT_VAR(vector2, T1, W, N), \
VECT_VAR(vector3, T1, W, N)); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), \
VECT_VAR(vector_res, T1, W, N))
#define TEST_VMLX(INSN, Q, T1, T2, W, N) \
TEST_VMLX1(INSN, Q, T1, T2, W, N)
DECL_VMLX(int, 8, 8);
DECL_VMLX(int, 16, 4);
DECL_VMLX(int, 32, 2);
DECL_VMLX(uint, 8, 8);
DECL_VMLX(uint, 16, 4);
DECL_VMLX(uint, 32, 2);
DECL_VMLX(float, 32, 2);
DECL_VMLX(int, 8, 16);
DECL_VMLX(int, 16, 8);
DECL_VMLX(int, 32, 4);
DECL_VMLX(uint, 8, 16);
DECL_VMLX(uint, 16, 8);
DECL_VMLX(uint, 32, 4);
DECL_VMLX(float, 32, 4);
clean_results ();
VLOAD(vector1, buffer, , int, s, 8, 8);
VLOAD(vector1, buffer, , int, s, 16, 4);
VLOAD(vector1, buffer, , int, s, 32, 2);
VLOAD(vector1, buffer, , uint, u, 8, 8);
VLOAD(vector1, buffer, , uint, u, 16, 4);
VLOAD(vector1, buffer, , uint, u, 32, 2);
VLOAD(vector1, buffer, , float, f, 32, 2);
VLOAD(vector1, buffer, q, int, s, 8, 16);
VLOAD(vector1, buffer, q, int, s, 16, 8);
VLOAD(vector1, buffer, q, int, s, 32, 4);
VLOAD(vector1, buffer, q, uint, u, 8, 16);
VLOAD(vector1, buffer, q, uint, u, 16, 8);
VLOAD(vector1, buffer, q, uint, u, 32, 4);
VLOAD(vector1, buffer, q, float, f, 32, 4);
VDUP(vector2, , int, s, 8, 8, 0x11);
VDUP(vector2, , int, s, 16, 4, 0x22);
VDUP(vector2, , int, s, 32, 2, 0x33);
VDUP(vector2, , uint, u, 8, 8, 0x44);
VDUP(vector2, , uint, u, 16, 4, 0x55);
VDUP(vector2, , uint, u, 32, 2, 0x66);
VDUP(vector2, , float, f, 32, 2, 33.1f);
VDUP(vector2, q, int, s, 8, 16, 0x77);
VDUP(vector2, q, int, s, 16, 8, 0x88);
VDUP(vector2, q, int, s, 32, 4, 0x99);
VDUP(vector2, q, uint, u, 8, 16, 0xAA);
VDUP(vector2, q, uint, u, 16, 8, 0xBB);
VDUP(vector2, q, uint, u, 32, 4, 0xCC);
VDUP(vector2, q, float, f, 32, 4, 99.2f);
VDUP(vector3, , int, s, 8, 8, 0xFF);
VDUP(vector3, , int, s, 16, 4, 0xEE);
VDUP(vector3, , int, s, 32, 2, 0xDD);
VDUP(vector3, , uint, u, 8, 8, 0xCC);
VDUP(vector3, , uint, u, 16, 4, 0xBB);
VDUP(vector3, , uint, u, 32, 2, 0xAA);
VDUP(vector3, , float, f, 32, 2, 10.23f);
VDUP(vector3, q, int, s, 8, 16, 0x99);
VDUP(vector3, q, int, s, 16, 8, 0x88);
VDUP(vector3, q, int, s, 32, 4, 0x77);
VDUP(vector3, q, uint, u, 8, 16, 0x66);
VDUP(vector3, q, uint, u, 16, 8, 0x55);
VDUP(vector3, q, uint, u, 32, 4, 0x44);
VDUP(vector3, q, float, f, 32, 4, 77.8f);
TEST_VMLX(INSN_NAME, , int, s, 8, 8);
TEST_VMLX(INSN_NAME, , int, s, 16, 4);
TEST_VMLX(INSN_NAME, , int, s, 32, 2);
TEST_VMLX(INSN_NAME, , uint, u, 8, 8);
TEST_VMLX(INSN_NAME, , uint, u, 16, 4);
TEST_VMLX(INSN_NAME, , uint, u, 32, 2);
TEST_VMLX(INSN_NAME, , float, f, 32, 2);
TEST_VMLX(INSN_NAME, q, int, s, 8, 16);
TEST_VMLX(INSN_NAME, q, int, s, 16, 8);
TEST_VMLX(INSN_NAME, q, int, s, 32, 4);
TEST_VMLX(INSN_NAME, q, uint, u, 8, 16);
TEST_VMLX(INSN_NAME, q, uint, u, 16, 8);
TEST_VMLX(INSN_NAME, q, uint, u, 32, 4);
TEST_VMLX(INSN_NAME, q, float, f, 32, 4);
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected, "");
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected, "");
}
int main (void)
{
FNNAME (INSN_NAME) ();
return 0;
}
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmla.c 0 → 100644
#include <arm_neon.h>
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
#define INSN_NAME vmla
#define TEST_MSG "VMLA"
/* Expected results. */
VECT_VAR_DECL(expected,int,8,8) [] = { 0xdf, 0xe0, 0xe1, 0xe2,
0xe3, 0xe4, 0xe5, 0xe6 };
VECT_VAR_DECL(expected,int,16,4) [] = { 0x1f8c, 0x1f8d, 0x1f8e, 0x1f8f };
VECT_VAR_DECL(expected,int,32,2) [] = { 0x2bf7, 0x2bf8 };
VECT_VAR_DECL(expected,uint,8,8) [] = { 0x20, 0x21, 0x22, 0x23,
0x24, 0x25, 0x26, 0x27 };
VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3e07, 0x3e08, 0x3e09, 0x3e0a };
VECT_VAR_DECL(expected,uint,32,2) [] = { 0x43ac, 0x43ad };
VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x43a14e76, 0x43a1ce76 };
VECT_VAR_DECL(expected,int,8,16) [] = { 0xf, 0x10, 0x11, 0x12,
0x13, 0x14, 0x15, 0x16,
0x17, 0x18, 0x19, 0x1a,
0x1b, 0x1c, 0x1d, 0x1e };
VECT_VAR_DECL(expected,int,16,8) [] = { 0x4830, 0x4831, 0x4832, 0x4833,
0x4834, 0x4835, 0x4836, 0x4837 };
VECT_VAR_DECL(expected,int,32,4) [] = { 0x470f, 0x4710, 0x4711, 0x4712 };
VECT_VAR_DECL(expected,uint,8,16) [] = { 0xac, 0xad, 0xae, 0xaf,
0xb0, 0xb1, 0xb2, 0xb3,
0xb4, 0xb5, 0xb6, 0xb7,
0xb8, 0xb9, 0xba, 0xbb };
VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3e07, 0x3e08, 0x3e09, 0x3e0a,
0x3e0b, 0x3e0c, 0x3e0d, 0x3e0e };
VECT_VAR_DECL(expected,uint,32,4) [] = { 0x3620, 0x3621, 0x3622, 0x3623 };
VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x45f0ae15, 0x45f0b615,
0x45f0be15, 0x45f0c615 };
#include "vmlX.inc"
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmls.c 0 → 100644
#include <arm_neon.h>
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
#define INSN_NAME vmls
#define TEST_MSG "VMLS"
/* Expected results. */
VECT_VAR_DECL(expected,int,8,8) [] = { 0x1, 0x2, 0x3, 0x4,
0x5, 0x6, 0x7, 0x8 };
VECT_VAR_DECL(expected,int,16,4) [] = { 0xe054, 0xe055, 0xe056, 0xe057 };
VECT_VAR_DECL(expected,int,32,2) [] = { 0xffffd3e9, 0xffffd3ea };
VECT_VAR_DECL(expected,uint,8,8) [] = { 0xc0, 0xc1, 0xc2, 0xc3,
0xc4, 0xc5, 0xc6, 0xc7 };
VECT_VAR_DECL(expected,uint,16,4) [] = { 0xc1d9, 0xc1da, 0xc1db, 0xc1dc };
VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffbc34, 0xffffbc35 };
VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0xc3b14e76, 0xc3b0ce76 };
VECT_VAR_DECL(expected,int,8,16) [] = { 0xd1, 0xd2, 0xd3, 0xd4,
0xd5, 0xd6, 0xd7, 0xd8,
0xd9, 0xda, 0xdb, 0xdc,
0xdd, 0xde, 0xdf, 0xe0 };
VECT_VAR_DECL(expected,int,16,8) [] = { 0xb7b0, 0xb7b1, 0xb7b2, 0xb7b3,
0xb7b4, 0xb7b5, 0xb7b6, 0xb7b7 };
VECT_VAR_DECL(expected,int,32,4) [] = { 0xffffb8d1, 0xffffb8d2,
0xffffb8d3, 0xffffb8d4 };
VECT_VAR_DECL(expected,uint,8,16) [] = { 0x34, 0x35, 0x36, 0x37,
0x38, 0x39, 0x3a, 0x3b,
0x3c, 0x3d, 0x3e, 0x3f,
0x40, 0x41, 0x42, 0x43 };
VECT_VAR_DECL(expected,uint,16,8) [] = { 0xc1d9, 0xc1da, 0xc1db, 0xc1dc,
0xc1dd, 0xc1de, 0xc1df, 0xc1e0 };
VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffc9c0, 0xffffc9c1,
0xffffc9c2, 0xffffc9c3 };
VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0xc5f1ae15, 0xc5f1a615,
0xc5f19e15, 0xc5f19615 };
#include "vmlX.inc"
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