Commit 84c2b4da by Uros Bizjak Committed by Uros Bizjak

i386.h (TARGET_FISTTP): Enable also for TARGET_SSE3 and only for TARGET_80387.

        * config/i386/i386.h (TARGET_FISTTP): Enable also for
        TARGET_SSE3 and only for TARGET_80387.
        * config/i386/i386.md (fix_trunc<mode>_fisttp_i387_1,
        (fix_trunc<mode>_i387_fisttp, fix_trunc<mode>_i387_fisttp_with_temp):
        Do not depend on TARGET_80387.

From-SVN: r104947
parent b4ceda13
2005-10-04 Uros Bizjak <uros@kss-loka.si>
* config/i386/i386.h (TARGET_FISTTP): Enable also for
TARGET_SSE3 and only for TARGET_80387.
* config/i386/i386.md (fix_trunc<mode>_fisttp_i387_1,
(fix_trunc<mode>_i387_fisttp, fix_trunc<mode>_i387_fisttp_with_temp):
Do not depend on TARGET_80387.
2005-10-04 Andrew Pinski <pinskia@physics.uc.edu> 2005-10-04 Andrew Pinski <pinskia@physics.uc.edu>
* tree.c (last_annotated_node): Change type to location_t*. * tree.c (last_annotated_node): Change type to location_t*.
......
...@@ -173,7 +173,8 @@ extern int x86_prefetch_sse; ...@@ -173,7 +173,8 @@ extern int x86_prefetch_sse;
/* For sane SSE instruction set generation we need fcomi instruction. It is /* For sane SSE instruction set generation we need fcomi instruction. It is
safe to enable all CMOVE instructions. */ safe to enable all CMOVE instructions. */
#define TARGET_CMOVE ((x86_cmove & (1 << ix86_arch)) || TARGET_SSE) #define TARGET_CMOVE ((x86_cmove & (1 << ix86_arch)) || TARGET_SSE)
#define TARGET_FISTTP (x86_fisttp & (1 << ix86_arch)) #define TARGET_FISTTP (((x86_fisttp & (1 << ix86_arch)) || TARGET_SSE3) \
&& TARGET_80387)
#define TARGET_DEEP_BRANCH_PREDICTION (x86_deep_branch & TUNEMASK) #define TARGET_DEEP_BRANCH_PREDICTION (x86_deep_branch & TUNEMASK)
#define TARGET_BRANCH_PREDICTION_HINTS (x86_branch_hints & TUNEMASK) #define TARGET_BRANCH_PREDICTION_HINTS (x86_branch_hints & TUNEMASK)
#define TARGET_DOUBLE_WITH_ADD (x86_double_with_add & TUNEMASK) #define TARGET_DOUBLE_WITH_ADD (x86_double_with_add & TUNEMASK)
......
...@@ -4069,7 +4069,7 @@ ...@@ -4069,7 +4069,7 @@
[(parallel [(set (match_operand:SI 0 "nonimmediate_operand" "") [(parallel [(set (match_operand:SI 0 "nonimmediate_operand" "")
(fix:SI (match_operand:SSEMODEF 1 "register_operand" ""))) (fix:SI (match_operand:SSEMODEF 1 "register_operand" "")))
(clobber (reg:CC FLAGS_REG))])] (clobber (reg:CC FLAGS_REG))])]
"TARGET_80387 || (SSE_FLOAT_MODE_P (<MODE>mode))" "TARGET_80387 || SSE_FLOAT_MODE_P (<MODE>mode)"
{ {
if (TARGET_FISTTP if (TARGET_FISTTP
&& !(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)) && !(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH))
...@@ -4162,7 +4162,7 @@ ...@@ -4162,7 +4162,7 @@
(define_insn_and_split "fix_trunc<mode>_fisttp_i387_1" (define_insn_and_split "fix_trunc<mode>_fisttp_i387_1"
[(set (match_operand:X87MODEI 0 "nonimmediate_operand" "=m,?r") [(set (match_operand:X87MODEI 0 "nonimmediate_operand" "=m,?r")
(fix:X87MODEI (match_operand 1 "register_operand" "f,f")))] (fix:X87MODEI (match_operand 1 "register_operand" "f,f")))]
"TARGET_80387 && TARGET_FISTTP "TARGET_FISTTP
&& FLOAT_MODE_P (GET_MODE (operands[1])) && FLOAT_MODE_P (GET_MODE (operands[1]))
&& !((SSE_FLOAT_MODE_P (GET_MODE (operands[1])) && !((SSE_FLOAT_MODE_P (GET_MODE (operands[1]))
&& (TARGET_64BIT || <MODE>mode != DImode)) && (TARGET_64BIT || <MODE>mode != DImode))
...@@ -4190,7 +4190,7 @@ ...@@ -4190,7 +4190,7 @@
[(set (match_operand:X87MODEI 0 "memory_operand" "=m") [(set (match_operand:X87MODEI 0 "memory_operand" "=m")
(fix:X87MODEI (match_operand 1 "register_operand" "f"))) (fix:X87MODEI (match_operand 1 "register_operand" "f")))
(clobber (match_scratch:XF 2 "=&1f"))] (clobber (match_scratch:XF 2 "=&1f"))]
"TARGET_80387 && TARGET_FISTTP "TARGET_FISTTP
&& FLOAT_MODE_P (GET_MODE (operands[1])) && FLOAT_MODE_P (GET_MODE (operands[1]))
&& !((SSE_FLOAT_MODE_P (GET_MODE (operands[1])) && !((SSE_FLOAT_MODE_P (GET_MODE (operands[1]))
&& (TARGET_64BIT || <MODE>mode != DImode)) && (TARGET_64BIT || <MODE>mode != DImode))
...@@ -4204,7 +4204,7 @@ ...@@ -4204,7 +4204,7 @@
(fix:X87MODEI (match_operand 1 "register_operand" "f,f"))) (fix:X87MODEI (match_operand 1 "register_operand" "f,f")))
(clobber (match_operand:X87MODEI 2 "memory_operand" "=m,m")) (clobber (match_operand:X87MODEI 2 "memory_operand" "=m,m"))
(clobber (match_scratch:XF 3 "=&1f,&1f"))] (clobber (match_scratch:XF 3 "=&1f,&1f"))]
"TARGET_80387 && TARGET_FISTTP "TARGET_FISTTP
&& FLOAT_MODE_P (GET_MODE (operands[1])) && FLOAT_MODE_P (GET_MODE (operands[1]))
&& !((SSE_FLOAT_MODE_P (GET_MODE (operands[1])) && !((SSE_FLOAT_MODE_P (GET_MODE (operands[1]))
&& (TARGET_64BIT || <MODE>mode != DImode)) && (TARGET_64BIT || <MODE>mode != DImode))
......
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