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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
844f5ccf
Commit
844f5ccf
authored
Jun 15, 2004
by
Paul Brook
Committed by
Paul Brook
Jun 15, 2004
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* gcc.dg/arm-mmx-1.c: Use asm to clobber registers.
From-SVN: r83189
parent
0792ab19
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2 changed files
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10 additions
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13 deletions
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-13
gcc/testsuite/ChangeLog
+4
-0
gcc/testsuite/gcc.dg/arm-mmx-1.c
+6
-13
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gcc/testsuite/ChangeLog
View file @
844f5ccf
2004
-
06
-
15
Paul
Brook
<
paul
@codesourcery
.
com
>
*
gcc
.
dg
/
arm
-
mmx
-
1
.
c
:
Use
asm
to
clobber
registers
.
2004
-
06
-
14
Giovanni
Bajo
<
giovannibajo
@gcc
.
gnu
.
org
>
PR
c
++/
15967
...
...
gcc/testsuite/gcc.dg/arm-mmx-1.c
View file @
844f5ccf
...
...
@@ -5,22 +5,15 @@
/* { dg-final { global compiler_flags; if ![string match "*-mthumb *" $compiler_flags] { scan-assembler "ldmfd\[ ]sp!.*ip,\[ ]*pc" } } } */
/* This function uses all the call-saved registers, namely r4, r5, r6,
r7, r8, r9, sl, fp. Since we also save
pc
, that leaves an odd
r7, r8, r9, sl, fp. Since we also save
lr
, that leaves an odd
number of registers, and the compiler will push ip to align the
stack. Make sure that we restore ip into ip, not into sp as is
done when using a frame pointer. The -mno-apcs-frame option
permits the frame pointer to be used as an ordinary register. */
int
foo
(
int
*
a
,
int
*
b
,
int
*
c
,
int
*
d
,
int
*
tot
)
{
int
i
,
j
,
k
,
l
,
m
,
n
,
o
;
*
tot
=
0
;
for
(
i
=
*
a
;
i
<
*
b
;
i
+=
*
c
)
for
(
j
=
*
a
;
j
<
*
b
;
j
+=
*
d
)
for
(
k
=
*
a
;
k
<
*
c
;
k
+=
*
d
)
for
(
l
=
*
b
;
k
<
*
c
;
k
+=
*
d
)
for
(
m
=
*
d
;
k
<
*
c
;
k
+=
*
b
)
*
tot
+=
i
+
j
+
k
+
l
+
m
;
return
*
tot
;
void
foo
(
void
)
{
__asm
volatile
(
""
:
:
:
"r4"
,
"r5"
,
"r6"
,
"r7"
,
"r8"
,
"r9"
,
"sl"
,
"fp"
,
"lr"
);
}
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