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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
83f44b39
Commit
83f44b39
authored
May 15, 2013
by
Ganesh Gopalasubramanian
Committed by
Ganesh Gopalasubramanian
May 15, 2013
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New instruction (FSGSBASE) for AMD bdver3 architecture
From-SVN: r198916
parent
ddc0bcbc
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gcc/ChangeLog
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gcc/config/i386/i386.c
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gcc/ChangeLog
View file @
83f44b39
2013-05-15 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
* config/i386/i386.c (processor_alias_table): Add instruction
FSGSBASE for AMD bdver3 architecture.
2013-05-14 Jakub Jelinek <jakub@redhat.com>
* tree.c (warn_deprecated_use): Print file:line using locus color.
...
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gcc/config/i386/i386.c
View file @
83f44b39
...
...
@@ -3000,7 +3000,7 @@ ix86_option_override_internal (bool main_args_p)
|
PTA_SSE4_2
|
PTA_AES
|
PTA_PCLMUL
|
PTA_AVX
|
PTA_XOP
|
PTA_LWP
|
PTA_BMI
|
PTA_TBM
|
PTA_F16C
|
PTA_FMA
|
PTA_PRFCHW
|
PTA_FXSR
|
PTA_XSAVE
|
PTA_XSAVEOPT
},
|
PTA_XSAVEOPT
|
PTA_FSGSBASE
},
{
"btver1"
,
PROCESSOR_BTVER1
,
CPU_GENERIC64
,
PTA_64BIT
|
PTA_MMX
|
PTA_SSE
|
PTA_SSE2
|
PTA_SSE3
|
PTA_SSSE3
|
PTA_SSE4A
|
PTA_ABM
|
PTA_CX16
|
PTA_PRFCHW
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