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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
83750c27
Commit
83750c27
authored
Jun 22, 1995
by
Richard Kenner
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(___modsi3): Correctly set SIGN register for modulo involving negative
numbers. From-SVN: r10029
parent
eed0e340
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gcc/config/arm/lib1funcs.asm
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gcc/config/arm/lib1funcs.asm
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83750c27
...
...
@@ -135,7 +135,8 @@ NAME:
stmdb
sp
!
,
REGLIST
lr
}
ifelse
(
S
,
`
true
'
,
`
@
compute
sign
of
result
; if neither is negative, no problem
eor
SIGN
,
divisor
,
dividend
@
compute
sign
ifelse
(
OP
,
`
div
'
,
`
eor
SIGN
,
divisor
,
dividend
@
compute
sign
'
,
`
mov
SIGN
,
dividend
'
)
cmp
divisor
,
#
0
rsbmi
divisor
,
divisor
,
#
0
beq
Ldiv_zero
...
...
@@ -1266,7 +1267,7 @@ pc .req r15
___modsi3
:
stmdb
sp
!
,
{
r4
,
r5
,
r6
,
lr
}
@
compute
sign
of
result
; if neither is negative, no problem
eor
r6
,
r1
,
r0
@
compute
sign
mov
r6
,
r0
cmp
r1
,
#
0
rsbmi
r1
,
r1
,
#
0
beq
Ldiv_zero
...
...
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