* gcc/config/vax/vax.md: Spellcheck, fix whitespace.

From-SVN: r97430

gcc/ChangeLog

+2005-04-01  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
+
+	* gcc/config/vax/vax.md: Spellcheck, fix whitespace.
+
 2005-04-01  Ian Lance Taylor  <ian@airs.com>
 
 	* gcc.c: Don't include <sys/resource.h> or declare getrusage.

gcc/config/vax/vax.md

@@ -23,7 +23,7 @@
 ;;- Instruction patterns.  When multiple patterns apply,
 ;;- the first one in the file is chosen.
 ;;-
-;;- See file "rtl.def" for documentation on define_insn, match_*, et. al.
+;;- See file "rtl.def" for documentation on define_insn, match_*, et al.
 ;;-
 ;;- cpp macro #define NOTICE_UPDATE_CC in file tm.h handles condition code
 ;;- updates for most instructions.
@@ -46,11 +46,10 @@
 (define_mode_macro VAXfp [SF DF])
 (define_mode_attr  fsfx [(SF "f") (DF "%#")])
 
-;; Some ouput patterns want integer immediates with a prefix...
+;; Some output patterns want integer immediates with a prefix...
 (define_mode_attr  iprefx [(QI "B") (HI "H") (SI "N")])
 
 ;; We don't want to allow a constant operand for test insns because
-;; We don't want to allow a constant operand for test insns because
 ;; (set (cc0) (const_int foo)) has no mode information.  Such insns will
 ;; be folded while optimizing anyway.
 
@@ -473,7 +472,7 @@
 		  (sign_extend:DI
 		   (match_operand:SI 2 "nonimmediate_operand" "g")))
 	 (match_operand:DI 3 "immediate_operand" "F")))]
-  "GET_CODE (operands[3]) == CONST_DOUBLE 
+  "GET_CODE (operands[3]) == CONST_DOUBLE
     && CONST_DOUBLE_HIGH (operands[3]) == (CONST_DOUBLE_LOW (operands[3]) >> 31)"
   "*
 {
@@ -608,7 +607,7 @@
 
 ;; Arithmetic right shift on the VAX works by negating the shift count,
 ;; then emitting a right shift with the shift count negated.  This means
-;; that all actual shift counts in the RTL will be positive.  This 
+;; that all actual shift counts in the RTL will be positive.  This
 ;; prevents converting shifts to ZERO_EXTRACTs with negative positions,
 ;; which isn't valid.
 (define_expand "ashrsi3"
@@ -1416,7 +1415,7 @@
   ""
   "casel %0,$0,%1")
 
-;;- load or push effective address 
+;;- load or push effective address
 ;; These come after the move and add/sub patterns
 ;; because we don't want pushl $1 turned into pushad 1.
 ;; or addl3 r1,r2,r3 turned into movab 0(r1)[r2],r3.
@@ -1499,7 +1498,7 @@
 ;; These used to be peepholes, but it is more straightforward to do them
 ;; as single insns.  However, we must force the output to be a register
 ;; if it is not an offsettable address so that we know that we can assign
-;; to it twice. 
+;; to it twice.
 
 ;; If we had a good way of evaluating the relative costs, these could be
 ;; machine-independent.