Commit 821014aa by Steve Ellcey Committed by Steve Ellcey

re PR target/46997 (new ia64 vector instructions are broken on HP-UX (big-endian))

2011-02-07  Steve Ellcey  <sje@cup.hp.com>

	PR target/46997
	* vect.md (vec_interleave_highv2sf): Change fmix for TARGET_BIG_ENDIAN.
	(vec_interleave_lowv2sf): Ditto.
	(vec_extract_evenv2sf): Add TARGET_BIG_ENDIAN check.
	(vec_extract_oddv2sf): Ditto.

From-SVN: r169904
parent 62dea57d
2011-02-07 Steve Ellcey <sje@cup.hp.com>
PR target/46997
* vect.md (vec_interleave_highv2sf): Change fmix for TARGET_BIG_ENDIAN.
(vec_interleave_lowv2sf): Ditto.
(vec_extract_evenv2sf): Add TARGET_BIG_ENDIAN check.
(vec_extract_oddv2sf): Ditto.
2011-02-07 Mike Stump <mikestump@comcast.net> 2011-02-07 Mike Stump <mikestump@comcast.net>
PR target/42333 PR target/42333
......
...@@ -1490,7 +1490,7 @@ ...@@ -1490,7 +1490,7 @@
{ {
/* Recall that vector elements are numbered in memory order. */ /* Recall that vector elements are numbered in memory order. */
if (TARGET_BIG_ENDIAN) if (TARGET_BIG_ENDIAN)
return "%,fmix.r %0 = %F1, %F2"; return "%,fmix.l %0 = %F1, %F2";
else else
return "%,fmix.l %0 = %F2, %F1"; return "%,fmix.l %0 = %F2, %F1";
} }
...@@ -1507,7 +1507,7 @@ ...@@ -1507,7 +1507,7 @@
{ {
/* Recall that vector elements are numbered in memory order. */ /* Recall that vector elements are numbered in memory order. */
if (TARGET_BIG_ENDIAN) if (TARGET_BIG_ENDIAN)
return "%,fmix.l %0 = %F1, %F2"; return "%,fmix.r %0 = %F1, %F2";
else else
return "%,fmix.r %0 = %F2, %F1"; return "%,fmix.r %0 = %F2, %F1";
} }
...@@ -1534,10 +1534,14 @@ ...@@ -1534,10 +1534,14 @@
[(match_operand:V2SF 0 "gr_register_operand" "") [(match_operand:V2SF 0 "gr_register_operand" "")
(match_operand:V2SF 1 "gr_register_operand" "") (match_operand:V2SF 1 "gr_register_operand" "")
(match_operand:V2SF 2 "gr_register_operand" "")] (match_operand:V2SF 2 "gr_register_operand" "")]
"!TARGET_BIG_ENDIAN" ""
{ {
emit_insn (gen_vec_interleave_lowv2sf (operands[0], operands[1], if (TARGET_BIG_ENDIAN)
operands[2])); emit_insn (gen_vec_interleave_highv2sf (operands[0], operands[1],
operands[2]));
else
emit_insn (gen_vec_interleave_lowv2sf (operands[0], operands[1],
operands[2]));
DONE; DONE;
}) })
...@@ -1545,10 +1549,14 @@ ...@@ -1545,10 +1549,14 @@
[(match_operand:V2SF 0 "gr_register_operand" "") [(match_operand:V2SF 0 "gr_register_operand" "")
(match_operand:V2SF 1 "gr_register_operand" "") (match_operand:V2SF 1 "gr_register_operand" "")
(match_operand:V2SF 2 "gr_register_operand" "")] (match_operand:V2SF 2 "gr_register_operand" "")]
"!TARGET_BIG_ENDIAN" ""
{ {
emit_insn (gen_vec_interleave_highv2sf (operands[0], operands[1], if (TARGET_BIG_ENDIAN)
operands[2])); emit_insn (gen_vec_interleave_lowv2sf (operands[0], operands[1],
operands[2]));
else
emit_insn (gen_vec_interleave_highv2sf (operands[0], operands[1],
operands[2]));
DONE; DONE;
}) })
......
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