[AArch64] Add tsv110 pipeline scheduling

Committed on behalf of Wu Yuan:

2019-04-04  wu yuan <wuyuan5@huawei.com>

	* config/aarch64/aarch64-cores.def (tsv1100): Change scheduling model.
	* config/aarch64/aarch64.md : Add "tsv110.md"
	* config/aarch64/tsv110.md: New file.

From-SVN: r270212

gcc/ChangeLog

+2019-04-08  wu yuan  <wuyuan5@huawei.com>
+
+	* config/aarch64/aarch64-cores.def (tsv1100): Change scheduling model.
+	* config/aarch64/aarch64.md : Add "tsv110.md"
+	* config/aarch64/tsv110.md: New file.
+
 2019-04-08  Richard Biener  <rguenther@suse.de>
 
 	PR tree-optimization/90006

gcc/config/aarch64/aarch64-cores.def

@@ -105,7 +105,7 @@ AARCH64_CORE("neoverse-n1",  neoversen1, cortexa57, 8_2A,  AARCH64_FL_FOR_ARCH8_
 AARCH64_CORE("neoverse-e1",  neoversee1, cortexa53, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_F16 | AARCH64_FL_RCPC | AARCH64_FL_DOTPROD | AARCH64_FL_SSBS, cortexa53, 0x41, 0xd4a, -1)
 
 /* HiSilicon ('H') cores. */
-AARCH64_CORE("tsv110",  tsv110, cortexa57, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_CRYPTO | AARCH64_FL_F16 | AARCH64_FL_AES | AARCH64_FL_SHA2, tsv110,   0x48, 0xd01, -1)
+AARCH64_CORE("tsv110",  tsv110, tsv110, 8_2A,  AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_CRYPTO | AARCH64_FL_F16 | AARCH64_FL_AES | AARCH64_FL_SHA2, tsv110,   0x48, 0xd01, -1)
 
 /* ARMv8.4-A Architecture Processors.  */
 

gcc/config/aarch64/aarch64.md

@@ -361,6 +361,7 @@
 (include "thunderx.md")
 (include "../arm/xgene1.md")
 (include "thunderx2t99.md")
+(include "tsv110.md")
 
 ;; -------------------------------------------------------------------
 ;; Jumps and other miscellaneous insns