Commit 80d56d04 by Ramana Radhakrishnan Committed by Ramana Radhakrishnan

Fix set but unused variables.

2010-04-17  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

        * config/arm/arm.c (arm_gen_constant): Remove unused variable 'can_shift'.
        (arm_rtx_costs_1): Remove unused variable 'extra_cost'.
        (arm_unwind_emit_set): Use variable 'offset'.
        (thumb1_output_casesi): Remove unused variable 'flags'.

From-SVN: r158460
parent e4522f78
2010-04-17 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* config/arm/arm.c (arm_gen_constant): Remove unused variable can_shift.
(arm_rtx_costs_1): Remove unused variable extra_cost.
(arm_unwind_emit_set): Use variable offset.
(thumb1_output_casesi): Remove unused variable flags.
2010-04-16 Jeff Law <law@redhat.com> 2010-04-16 Jeff Law <law@redhat.com>
* ira-color.c (ira_reassign_pseudos): Collect and sort all the pseudos * ira-color.c (ira_reassign_pseudos): Collect and sort all the pseudos
......
...@@ -2522,7 +2522,6 @@ arm_gen_constant (enum rtx_code code, enum machine_mode mode, rtx cond, ...@@ -2522,7 +2522,6 @@ arm_gen_constant (enum rtx_code code, enum machine_mode mode, rtx cond,
int can_negate = 0; int can_negate = 0;
int final_invert = 0; int final_invert = 0;
int can_negate_initial = 0; int can_negate_initial = 0;
int can_shift = 0;
int i; int i;
int num_bits_set = 0; int num_bits_set = 0;
int set_sign_bit_copies = 0; int set_sign_bit_copies = 0;
...@@ -2541,7 +2540,6 @@ arm_gen_constant (enum rtx_code code, enum machine_mode mode, rtx cond, ...@@ -2541,7 +2540,6 @@ arm_gen_constant (enum rtx_code code, enum machine_mode mode, rtx cond,
{ {
case SET: case SET:
can_invert = 1; can_invert = 1;
can_shift = 1;
can_negate = 1; can_negate = 1;
break; break;
...@@ -6340,7 +6338,6 @@ arm_rtx_costs_1 (rtx x, enum rtx_code outer, int* total, bool speed) ...@@ -6340,7 +6338,6 @@ arm_rtx_costs_1 (rtx x, enum rtx_code outer, int* total, bool speed)
enum rtx_code subcode; enum rtx_code subcode;
rtx operand; rtx operand;
enum rtx_code code = GET_CODE (x); enum rtx_code code = GET_CODE (x);
int extra_cost;
*total = 0; *total = 0;
switch (code) switch (code)
...@@ -6564,7 +6561,6 @@ arm_rtx_costs_1 (rtx x, enum rtx_code outer, int* total, bool speed) ...@@ -6564,7 +6561,6 @@ arm_rtx_costs_1 (rtx x, enum rtx_code outer, int* total, bool speed)
/* Fall through */ /* Fall through */
case AND: case XOR: case IOR: case AND: case XOR: case IOR:
extra_cost = 0;
/* Normally the frame registers will be spilt into reg+const during /* Normally the frame registers will be spilt into reg+const during
reload, so it is a bad idea to combine them with other instructions, reload, so it is a bad idea to combine them with other instructions,
...@@ -21121,7 +21117,7 @@ arm_unwind_emit_set (FILE * asm_out_file, rtx p) ...@@ -21121,7 +21117,7 @@ arm_unwind_emit_set (FILE * asm_out_file, rtx p)
offset = INTVAL (XEXP (e1, 1)); offset = INTVAL (XEXP (e1, 1));
asm_fprintf (asm_out_file, "\t.setfp %r, %r, #%wd\n", asm_fprintf (asm_out_file, "\t.setfp %r, %r, #%wd\n",
HARD_FRAME_POINTER_REGNUM, reg, HARD_FRAME_POINTER_REGNUM, reg,
INTVAL (XEXP (e1, 1))); offset);
} }
else if (GET_CODE (e1) == REG) else if (GET_CODE (e1) == REG)
{ {
...@@ -21411,12 +21407,9 @@ const char * ...@@ -21411,12 +21407,9 @@ const char *
thumb1_output_casesi (rtx *operands) thumb1_output_casesi (rtx *operands)
{ {
rtx diff_vec = PATTERN (next_real_insn (operands[0])); rtx diff_vec = PATTERN (next_real_insn (operands[0]));
addr_diff_vec_flags flags;
gcc_assert (GET_CODE (diff_vec) == ADDR_DIFF_VEC); gcc_assert (GET_CODE (diff_vec) == ADDR_DIFF_VEC);
flags = ADDR_DIFF_VEC_FLAGS (diff_vec);
switch (GET_MODE(diff_vec)) switch (GET_MODE(diff_vec))
{ {
case QImode: case QImode:
......
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