Enable target specific builtins and macros when using the target attribute or pragma on rs6000

From-SVN: r181809

gcc/ChangeLog

+2011-11-29  Michael Meissner  <meissner@linux.vnet.ibm.com>
+
+	* config/rs6000/rs6000-builtins.def: Completely rewrite builtin
+	handling to centralize more of the builtins in this file.  Change
+	some builtin enumerations to be more consistant.  Use a new mask
+	to hold the current builtins, including SPE and PAIRED builtins
+	which no longer are set via target_flags masks.  Add
+	-mdebug=builtin debug support.  For power machines, define all
+	Altivec and VSX buitins when the compiler starts, but don't allow
+	the use of a builtin unless the appropriate switch is used, or
+	#pragma GCC target is used to change the options.  If the user
+	uses #pragma GCC target, update the appropriate hardware macros.
+	* common/config/rs6000/rs6000-common.c (rs6000_handle_option):
+	Ditto.
+	* config/rs6000/rs6000.opt (rs6000_builtin_mask): Ditto.
+	* config/rs6000/rs6000-c.c (rs6000_macro_to_expand): Ditto.
+	(rs6000_define_or_undefine_macro): Ditto.
+	(rs6000_target_modify_macros): Ditto.
+	(rs6000_cpu_cpp_builtins): Ditto.
+	(altivec_overloaded_builtins): Ditto.
+	(altivec_build_resolved_builtin): Ditto.
+	* config/rs6000/rs6000.c (rs6000_target_modify_macros_ptr):
+	Ditto.
+	(rs6000_builtin_info): Ditto.
+	(def_builtin): Ditto.
+	(enable_mask_for_builtins): Ditto.
+	(DEBUG_FMT_X): Ditto.
+	(rs6000_debug_reg_global): Ditto.
+	(rs6000_builtin_mask_calculate): Ditto.
+	(rs6000_option_override_internal): Ditto.
+	(rs6000_builtin_conversion): Ditto.
+	(rs6000_builtin_vectorized_function): Ditto.
+	(bdesc_3arg): Ditto.
+	(bdesc_dst): Ditto.
+	(bdesc_2arg): Ditto.
+	(builtin_description_predicates): Ditto.
+	(bdesc_altivec_preds): Ditto.
+	(bdesc_spe_predicates): Ditto.
+	(bdesc_spe_evsel): Ditto.
+	(bdesc_paired_preds): Ditto.
+	(bdesc_abs): Ditto.
+	(bdesc_1arg): Ditto.
+	(rs6000_overloaded_builtin_p): Ditto.
+	(rs6000_expand_unop_builtin): Ditto.
+	(bdesc_2arg_spe): Ditto.
+	(spe_expand_builtin): Ditto.
+	(rs6000_invalid_builtin): Ditto.
+	(rs6000_expand_builtin): Ditto.
+	(rs6000_init_builtins): Ditto.
+	(spe_init_builtins): Ditto.
+	(paired_init_builtins): Ditto.
+	(altivec_init_builtins): Ditto.
+	(builtin_function_type): Ditto.
+	(rs6000_common_init_builtins): Ditto.
+	(rs6000_builtin_reciprocal): Ditto.
+	(rs6000_builtin_mask_names): Ditto.
+	(rs6000_pragma_target_parse): Ditto.
+	(rs6000_function_specific_print): Ditto.
+	* config/rs6000/rs6000.h (MASK_DEBUG_BUILTIN): Ditto.
+	(MASK_DEBUG_ALL): Ditto.
+	(TARGET_DEBUG_BUILTIN): Ditto.
+	(TARGET_EXTRA_BUILTINS): Ditto.
+	(REGISTER_TARGET_PRAGMAS): Ditto.
+	(enum rs6000_btc): Ditto.
+	(RS6000_BTC_*): Ditto.
+	(RS6000_BTM_*): Ditto.
+	(enum rs6000_builtins): Ditto.
+	* config/rs6000/rs6000-protos.h (rs6000_overloaded_builtin_p):
+	Ditto.
+	(rs6000_target_modify_macros): Ditto.
+	(rs6000_target_modify_macros_ptr): Ditto.
+
+	* config/rs6000/vector.md (unsfloat<VEC_int><mode>2): Use the
+	standard name for converting vector unsigned values to floating
+	point.  Delete the TARGET_VECTORIZE_BUILTIN_CONVERSION hook, which
+	is handled by machine independent code.
+	* config/rs6000/rs6000.c (TARGET_VECTORIZE_BUILTIN_CONVERSION):
+	Ditto.
+	(rs6000_builtin_conversion): Ditto.
+
 2011-11-29  Dodji Seketeli  <dodji@redhat.com>
 
 	* tree-diagnostic (struct loc_t): Rename into struct loc_map_pair.

gcc/common/config/rs6000/rs6000-common.c

@@ -202,6 +202,8 @@ rs6000_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
 	    mask = MASK_DEBUG_COST;
 	  else if (! strcmp (q, "target"))
 	    mask = MASK_DEBUG_TARGET;
+	  else if (! strcmp (q, "builtin"))
+	    mask = MASK_DEBUG_BUILTIN;
 	  else
 	    error_at (loc, "unknown -mdebug-%s switch", q);
 

gcc/config/rs6000/rs6000-protos.h

@@ -170,6 +170,8 @@ extern const char * output_isel (rtx *);
 extern void rs6000_call_indirect_aix (rtx, rtx, rtx);
 extern void rs6000_aix_asm_output_dwarf_table_ref (char *);
 extern void get_ppc476_thunk_name (char name[32]);
+extern bool rs6000_overloaded_builtin_p (enum rs6000_builtins);
+extern unsigned rs6000_builtin_mask_calculate (void);
 
 /* Declare functions in rs6000-c.c */
 
@@ -178,6 +180,8 @@ extern void rs6000_cpu_cpp_builtins (struct cpp_reader *);
 #ifdef TREE_CODE
 extern bool rs6000_pragma_target_parse (tree, tree);
 #endif
+extern void rs6000_target_modify_macros (bool, int, unsigned);
+extern void (*rs6000_target_modify_macros_ptr) (bool, int, unsigned);
 
 #if TARGET_MACHO
 char *output_call (rtx, rtx *, int, int);

gcc/config/rs6000/rs6000.h

@@ -373,12 +373,14 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
 #define MASK_DEBUG_ADDR		0x08	/* debug memory addressing */
 #define MASK_DEBUG_COST		0x10	/* debug rtx codes */
 #define MASK_DEBUG_TARGET	0x20	/* debug target attribute/pragma */
+#define MASK_DEBUG_BUILTIN	0x40	/* debug builtins */
 #define MASK_DEBUG_ALL		(MASK_DEBUG_STACK \
 				 | MASK_DEBUG_ARG \
 				 | MASK_DEBUG_REG \
 				 | MASK_DEBUG_ADDR \
 				 | MASK_DEBUG_COST \
-				 | MASK_DEBUG_TARGET)
+				 | MASK_DEBUG_TARGET \
+				 | MASK_DEBUG_BUILTIN)
 
 #define	TARGET_DEBUG_STACK	(rs6000_debug & MASK_DEBUG_STACK)
 #define	TARGET_DEBUG_ARG	(rs6000_debug & MASK_DEBUG_ARG)
@@ -386,6 +388,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
 #define TARGET_DEBUG_ADDR	(rs6000_debug & MASK_DEBUG_ADDR)
 #define TARGET_DEBUG_COST	(rs6000_debug & MASK_DEBUG_COST)
 #define TARGET_DEBUG_TARGET	(rs6000_debug & MASK_DEBUG_TARGET)
+#define TARGET_DEBUG_BUILTIN	(rs6000_debug & MASK_DEBUG_BUILTIN)
 
 extern enum rs6000_vector rs6000_vector_unit[];
 
@@ -480,6 +483,24 @@ extern int rs6000_vector_align[];
 #define TARGET_FCTIDUZ	TARGET_POPCNTD
 #define TARGET_FCTIWUZ	TARGET_POPCNTD
 
+/* For power systems, we want to enable Altivec and VSX builtins even if the
+   user did not use -maltivec or -mvsx to allow the builtins to be used inside
+   of #pragma GCC target or the target attribute to change the code level for a
+   given system.  The SPE and Paired builtins are only enabled if you configure
+   the compiler for those builtins, and those machines don't support altivec or
+   VSX.  */
+
+#define TARGET_EXTRA_BUILTINS	(!TARGET_SPE && !TARGET_PAIRED_FLOAT	 \
+				 && ((TARGET_POWERPC64			 \
+				      || TARGET_PPC_GPOPT /* 970 */	 \
+				      || TARGET_POPCNTB	  /* ISA 2.02 */ \
+				      || TARGET_CMPB	  /* ISA 2.05 */ \
+				      || TARGET_POPCNTD	  /* ISA 2.06 */ \
+				      || TARGET_ALTIVEC			 \
+				      || TARGET_VSX)))
+
+
+
 /* E500 processors only support plain "sync", not lwsync.  */
 #define TARGET_NO_LWSYNC TARGET_E500
 
@@ -531,6 +552,7 @@ extern unsigned char rs6000_recip_bits[];
   c_register_pragma (0, "longcall", rs6000_pragma_longcall);	\
   targetm.target_option.pragma_parse = rs6000_pragma_target_parse; \
   targetm.resolve_overloaded_builtin = altivec_resolve_overloaded_builtin; \
+  rs6000_target_modify_macros_ptr = rs6000_target_modify_macros; \
 } while (0)
 
 /* Target #defines.  */
@@ -2271,24 +2293,83 @@ extern char rs6000_reg_names[][8];	/* register names (0 vs. %r0).  */
 /* General flags.  */
 extern int frame_pointer_needed;
 
-/* Classification of the builtin functions to properly set the declaration tree
-   flags.  */
-enum rs6000_btc
-{
-  RS6000_BTC_MISC,		/* assume builtin can do anything */
-  RS6000_BTC_CONST,		/* builtin is a 'const' function.  */
-  RS6000_BTC_PURE,		/* builtin is a 'pure' function.  */
-  RS6000_BTC_FP_PURE		/* builtin is 'pure' if rounding math.  */
-};
+/* Classification of the builtin functions as to which switches enable the
+   builtin, and what attributes it should have.  We used to use the target
+   flags macros, but we've run out of bits, so we now map the options into new
+   settings used here.  */
+
+/* Builtin attributes.  */
+#define RS6000_BTC_SPECIAL	0x00000000	/* Special function.  */
+#define RS6000_BTC_UNARY	0x00000001	/* normal unary function.  */
+#define RS6000_BTC_BINARY	0x00000002	/* normal binary function.  */
+#define RS6000_BTC_TERNARY	0x00000003	/* normal ternary function.  */
+#define RS6000_BTC_PREDICATE	0x00000004	/* predicate function.  */
+#define RS6000_BTC_ABS		0x00000005	/* Altivec/VSX ABS function.  */
+#define RS6000_BTC_EVSEL	0x00000006	/* SPE EVSEL function.  */
+#define RS6000_BTC_DST		0x00000007	/* Altivec DST function.  */
+#define RS6000_BTC_TYPE_MASK	0x0000000f	/* Mask to isolate types */
+
+#define RS6000_BTC_MISC		0x00000000	/* No special attributes.  */
+#define RS6000_BTC_CONST	0x00000100	/* uses no global state.  */
+#define RS6000_BTC_PURE		0x00000200	/* reads global state/mem.  */
+#define RS6000_BTC_FP		0x00000400	/* depends on rounding mode.  */
+#define RS6000_BTC_ATTR_MASK	0x00000700	/* Mask of the attributes.  */
+
+/* Miscellaneous information.  */
+#define RS6000_BTC_OVERLOADED	0x4000000	/* function is overloaded.  */
 
 /* Convenience macros to document the instruction type.  */
-#define RS6000_BTC_MEM	RS6000_BTC_MISC	/* load/store touches memory */
-#define RS6000_BTC_SAT	RS6000_BTC_MISC	/* VMX saturate sets VSCR register */
-
-#undef RS6000_BUILTIN
-#undef RS6000_BUILTIN_EQUATE
-#define RS6000_BUILTIN(NAME, TYPE) NAME,
-#define RS6000_BUILTIN_EQUATE(NAME, VALUE) NAME = VALUE,
+#define RS6000_BTC_MEM		RS6000_BTC_MISC	/* load/store touches mem.  */
+#define RS6000_BTC_SAT		RS6000_BTC_MISC	/* saturate sets VSCR.  */
+
+/* Builtin targets.  For now, we reuse the masks for those options that are in
+   target flags, and pick two random bits for SPE and paired which aren't in
+   target_flags.  */
+#define RS6000_BTM_ALTIVEC	MASK_ALTIVEC	/* VMX/altivec vectors.  */
+#define RS6000_BTM_VSX		MASK_VSX	/* VSX (vector/scalar).  */
+#define RS6000_BTM_SPE		MASK_STRING	/* E500 */
+#define RS6000_BTM_PAIRED	MASK_MULHW	/* 750CL paired insns.  */
+#define RS6000_BTM_FRE		MASK_POPCNTB	/* FRE instruction.  */
+#define RS6000_BTM_FRES		MASK_PPC_GFXOPT	/* FRES instruction.  */
+#define RS6000_BTM_FRSQRTE	MASK_PPC_GFXOPT	/* FRSQRTE instruction.  */
+#define RS6000_BTM_FRSQRTES	MASK_POPCNTB	/* FRSQRTES instruction.  */
+#define RS6000_BTM_POPCNTD	MASK_POPCNTD	/* Target supports ISA 2.06.  */
+#define RS6000_BTM_POWERPC	MASK_POWERPC	/* Target is powerpc.  */
+#define RS6000_BTM_CELL		MASK_FPRND	/* Target is cell powerpc.  */
+
+#define RS6000_BTM_COMMON	(RS6000_BTM_ALTIVEC			\
+				 | RS6000_BTM_VSX			\
+				 | RS6000_BTM_FRE			\
+				 | RS6000_BTM_FRES			\
+				 | RS6000_BTM_FRSQRTE			\
+				 | RS6000_BTM_FRSQRTES			\
+				 | RS6000_BTM_POPCNTD			\
+				 | RS6000_BTM_POWERPC			\
+				 | RS6000_BTM_CELL)
+
+/* Define builtin enum index.  */
+
+#undef RS6000_BUILTIN_1
+#undef RS6000_BUILTIN_2
+#undef RS6000_BUILTIN_3
+#undef RS6000_BUILTIN_A
+#undef RS6000_BUILTIN_D
+#undef RS6000_BUILTIN_E
+#undef RS6000_BUILTIN_P
+#undef RS6000_BUILTIN_Q
+#undef RS6000_BUILTIN_S
+#undef RS6000_BUILTIN_X
+
+#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
+#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
+#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
+#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
+#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
+#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
+#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
+#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
+#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
+#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
 
 enum rs6000_builtins
 {
@@ -2297,8 +2378,16 @@ enum rs6000_builtins
   RS6000_BUILTIN_COUNT
 };
 
-#undef RS6000_BUILTIN
-#undef RS6000_BUILTIN_EQUATE
+#undef RS6000_BUILTIN_1
+#undef RS6000_BUILTIN_2
+#undef RS6000_BUILTIN_3
+#undef RS6000_BUILTIN_A
+#undef RS6000_BUILTIN_D
+#undef RS6000_BUILTIN_E
+#undef RS6000_BUILTIN_P
+#undef RS6000_BUILTIN_Q
+#undef RS6000_BUILTIN_S
+#undef RS6000_BUILTIN_X
 
 enum rs6000_builtin_type_index
 {

gcc/config/rs6000/rs6000.opt

@@ -79,6 +79,10 @@ enum rs6000_cmodel rs6000_current_cmodel = CMODEL_SMALL
 TargetVariable
 unsigned int rs6000_recip_control
 
+;; Mask of what builtin functions are allowed
+TargetVariable
+unsigned int rs6000_builtin_mask
+
 ;; Debug flags
 TargetVariable
 unsigned int rs6000_debug

gcc/config/rs6000/vector.md

@@ -677,7 +677,7 @@
     }
 }")
 
-(define_expand "unsigned_float<VEC_int><mode>2"
+(define_expand "floatuns<VEC_int><mode>2"
   [(set (match_operand:VEC_F 0 "vfloat_operand" "")
 	(unsigned_float:VEC_F (match_operand:<VEC_INT> 1 "vint_operand" "")))]
   "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"

gcc/testsuite/ChangeLog

+2011-11-29  Michael Meissner  <meissner@linux.vnet.ibm.com>
+
+	* gcc.target/powerpc/ppc-target-4.c: New file to test target
+	specific functions enabling target specific builtins.
+
 2011-11-29  Yufeng Zhang  <yufeng.zhang@arm.com>
 
 	Use complex floating-point constant in CDBL.