Commit 7f9dc823 by James E Wilson Committed by Jim Wilson

Fix typo in docs.

PR target/23644
* doc/invoke.texi (IA-64 Options, item -mtune): Renamed from
-mtune-arch.

From-SVN: r105105
parent 0dc43461
2005-10-07 James E. Wilson <wilson@specifix.com> 2005-10-07 James E. Wilson <wilson@specifix.com>
PR target/23644
* doc/invoke.texi (IA-64 Options, item -mtune): Renamed from
-mtune-arch.
PR target/24193 PR target/24193
* config/ia64/ia64.md (movbi, movti_internal, gr_spill_internal, * config/ia64/ia64.md (movbi, movti_internal, gr_spill_internal,
fr_spill): Use destination_operand for operand 0. fr_spill): Use destination_operand for operand 0.
......
...@@ -9514,8 +9514,8 @@ specified separated by a comma. ...@@ -9514,8 +9514,8 @@ specified separated by a comma.
Specify bit size of immediate TLS offsets. Valid values are 14, 22, and Specify bit size of immediate TLS offsets. Valid values are 14, 22, and
64. 64.
@item -mtune-arch=@var{cpu-type} @item -mtune=@var{cpu-type}
@opindex mtune-arch @opindex mtune
Tune the instruction scheduling for a particular CPU, Valid values are Tune the instruction scheduling for a particular CPU, Valid values are
itanium, itanium1, merced, itanium2, and mckinley. itanium, itanium1, merced, itanium2, and mckinley.
......
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