[ARM 5/5 big.LITTLE] Add support for -mcpu=cortex-a57.cortex-a53

gcc/

	* config/arm/arm-cores.def (cortex-a57.cortex-a53): New.
	* doc/invoke.texi: Document -mcpu=cortex-a57.cortex-a53.
	* config/arm/arm-tables.opt: Regenerate.
	* config/arm/arm-tune.md: Regenerate.
	* config/arm/bpabi.h
	(BE8_LINK_SPEC): Handle -mcpu=cortex-a57.cortex-a53.

From-SVN: r206049

gcc/ChangeLog

 2013-12-17  James Greenhalgh  <james.greenhalgh@arm.com>
 
+	* config/arm/arm-cores.def (cortex-a57.cortex-a53): New.
+	* doc/invoke.texi: Document -mcpu=cortex-a57.cortex-a53.
+	* config/arm/arm-tables.opt: Regenerate.
+	* config/arm/arm-tune.md: Regenerate.
+	* config/arm/bpabi.h
+	(BE8_LINK_SPEC): Handle -mcpu=cortex-a57.cortex-a53.
+
+2013-12-17  James Greenhalgh  <james.greenhalgh@arm.com>
+
 	* config/arm/arm-cores.def (cortex-a57): New.
 	* doc/invoke.texi: Document -mcpu=cortex-a57.
 	* config/arm/arm-tables.opt: Regenerate.

gcc/config/arm/arm-cores.def

@@ -154,3 +154,6 @@ ARM_CORE("cortex-a15.cortex-a7", cortexa15cortexa7, cortexa7,	7A,  FL_LDSCHED |
 /* V8 Architecture Processors */
 ARM_CORE("cortex-a53",	cortexa53, cortexa53,	8A, FL_LDSCHED, cortex_a53)
 ARM_CORE("cortex-a57",	cortexa57, cortexa15,	8A, FL_LDSCHED, cortex_a15)
+
+/* V8 big.LITTLE implementations */
+ARM_CORE("cortex-a57.cortex-a53", cortexa57cortexa53, cortexa53, 8A,  FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15)

gcc/config/arm/arm-tables.opt

@@ -291,6 +291,9 @@ Enum(processor_type) String(cortex-a53) Value(cortexa53)
 EnumValue
 Enum(processor_type) String(cortex-a57) Value(cortexa57)
 
+EnumValue
+Enum(processor_type) String(cortex-a57.cortex-a53) Value(cortexa57cortexa53)
+
 Enum
 Name(arm_arch) Type(int)
 Known ARM architectures (for use with the -march= option):

gcc/config/arm/arm-tune.md

@@ -30,5 +30,5 @@
 	cortexa15,cortexr4,cortexr4f,
 	cortexr5,cortexr7,cortexm4,
 	cortexm3,marvell_pj4,cortexa15cortexa7,
-	cortexa53,cortexa57"
+	cortexa53,cortexa57,cortexa57cortexa53"
 	(const (symbol_ref "((enum attr_tune) arm_tune)")))

gcc/config/arm/bpabi.h

@@ -64,6 +64,7 @@
    |mcpu=marvell-pj4					\
    |mcpu=cortex-a53					\
    |mcpu=cortex-a57					\
+   |mcpu=cortex-a57.cortex-a53				\
    |mcpu=generic-armv7-a                                \
    |march=armv7-m|mcpu=cortex-m3                        \
    |march=armv7e-m|mcpu=cortex-m4                       \
@@ -79,6 +80,7 @@
    |mcpu=cortex-a15.cortex-a7				\
    |mcpu=cortex-a53					\
    |mcpu=cortex-a57					\
+   |mcpu=cortex-a57.cortex-a53				\
    |mcpu=marvell-pj4					\
    |mcpu=generic-armv7-a                                \
    |march=armv7-m|mcpu=cortex-m3                        \

gcc/doc/invoke.texi

@@ -12170,8 +12170,8 @@ assembly code.  Permissible names are: @samp{arm2}, @samp{arm250},
 @samp{fa606te}, @samp{fa626te}, @samp{fmp626}, @samp{fa726te}.
 
 Additionally, this option can specify that GCC should tune the performance
-of the code for a big.LITTLE system.  The only permissible name is:
-@samp{cortex-a15.cortex-a7}.
+of the code for a big.LITTLE system.  Permissible names are:
+@samp{cortex-a15.cortex-a7}, @samp{cortex-a57.cortex-a53}.
 
 @option{-mcpu=generic-@var{arch}} is also permissible, and is
 equivalent to @option{-march=@var{arch} -mtune=generic-@var{arch}}.