mips.md (SHORT): Fix long line.

gcc/
	* config/mips/mips.md (SHORT): Fix long line.
	(SUBDI): New mode iterator.  Extend the shift-and-truncate insns
	to QImode and HImoe.

gcc/testsuite/
	* gcc.target/mips/truncate-1.c: New test.

From-SVN: r128525

gcc/ChangeLog

 2007-09-16  Richard Sandiford  <rsandifo@nildram.co.uk>
 
+	* config/mips/mips.md (SHORT): Fix long line.
+	(SUBDI): New mode iterator.  Extend the shift-and-truncate insns
+	to QImode and HImoe.
+
+2007-09-16  Richard Sandiford  <rsandifo@nildram.co.uk>
+
 	* config/mips/mips.h (POINTERS_EXTEND_UNSIGNED): Define.
 
 2007-09-15  Zdenek Dvorak  <ook@ucw.cz>

gcc/config/mips/mips.md

@@ -481,10 +481,13 @@
 ;; conditional-move-type condition is needed.
 (define_mode_iterator MOVECC [SI (DI "TARGET_64BIT") (CC "TARGET_HARD_FLOAT")])
 
-;; This mode iterator allows the QI and HI extension patterns to be defined from
-;; the same template.
+;; This mode iterator allows the QI and HI extension patterns to be
+;; defined from the same template.
 (define_mode_iterator SHORT [QI HI])
 
+;; Likewise the 64-bit truncate-and-shift patterns.
+(define_mode_iterator SUBDI [QI HI SI])
+
 ;; This mode iterator allows :ANYF to be used wherever a scalar or vector
 ;; floating-point mode is allowed.
 (define_mode_iterator ANYF [(SF "TARGET_HARD_FLOAT")
@@ -2314,19 +2317,20 @@
 ;; Combiner patterns to optimize shift/truncate combinations.
 
 (define_insn ""
-  [(set (match_operand:SI 0 "register_operand" "=d")
-        (truncate:SI
+  [(set (match_operand:SUBDI 0 "register_operand" "=d")
+        (truncate:SUBDI
 	  (ashiftrt:DI (match_operand:DI 1 "register_operand" "d")
-                       (match_operand:DI 2 "const_arith_operand" ""))))]
+		       (match_operand:DI 2 "const_arith_operand" ""))))]
   "TARGET_64BIT && !TARGET_MIPS16 && INTVAL (operands[2]) >= 32"
   "dsra\t%0,%1,%2"
   [(set_attr "type" "shift")
    (set_attr "mode" "SI")])
 
 (define_insn ""
-  [(set (match_operand:SI 0 "register_operand" "=d")
-        (truncate:SI (lshiftrt:DI (match_operand:DI 1 "register_operand" "d")
-                                  (const_int 32))))]
+  [(set (match_operand:SUBDI 0 "register_operand" "=d")
+        (truncate:SUBDI
+	  (lshiftrt:DI (match_operand:DI 1 "register_operand" "d")
+		       (const_int 32))))]
   "TARGET_64BIT && !TARGET_MIPS16"
   "dsra\t%0,%1,32"
   [(set_attr "type" "shift")

gcc/testsuite/ChangeLog

+2007-09-16  Richard Sandiford  <rsandifo@nildram.co.uk>
+
+	* gcc.target/mips/truncate-1.c: New test.
+
 2007-09-16  Paul Thomas  <pault@gcc.gnu.org>
 
 	PR fortran/29396

gcc/testsuite/gcc.target/mips/truncate-1.c

+/* { dg-mips-options "-O -mgp64" } */
+
+#define TEST(ID, TYPE, SHIFT)				\
+  int __attribute__((nomips16))				\
+  f##ID (unsigned long long y)				\
+  {							\
+    return (TYPE) ((TYPE) (y >> SHIFT) + 1);		\
+  }
+
+TEST (1, int, 32)
+TEST (2, short, 32)
+TEST (3, char, 32)
+TEST (4, int, 33)
+TEST (5, short, 33)
+TEST (6, char, 33)
+TEST (7, int, 61)
+TEST (8, short, 61)
+TEST (9, char, 61)
+
+/* { dg-final { scan-assembler-not "\tsll\t\[^\n\]*,0" } } */