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Commit 7e58a4d3 by Nick Clifton Committed by Nick Clifton
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Document ARM specific command line switches. 

From-SVN: r23209
parent 866e9df8
Showing with 48 additions and 31 deletions
gcc/ChangeLog
Wed Oct 21 09:15:06 1998 Nick Clifton <nickc@cygnus.com>
* config/arm/arm.h (TARGET_SWITCHES): Document arm specific
command line switches.
Tue Oct 20 10:04:51 1998 Graham <grahams@rcp.co.uk> Tue Oct 20 10:04:51 1998 Graham <grahams@rcp.co.uk>
* reload.c (loc_mentioned_in_p): Add missing braces to bind * reload.c (loc_mentioned_in_p): Add missing braces to bind
...@@ -343,8 +348,6 @@ Fri Oct 16 15:26:24 1998 Dave Brolley <brolley@cygnus.com> ...@@ -343,8 +348,6 @@ Fri Oct 16 15:26:24 1998 Dave Brolley <brolley@cygnus.com>
* c-lex.c (yylex): Fix unaligned access of wchar_t. * c-lex.c (yylex): Fix unaligned access of wchar_t.
>>>>>>> 1.2326
>>>>>>> 1.2342
Fri Oct 16 10:47:53 1998 Nick Clifton <nickc@cygnus.com> Fri Oct 16 10:47:53 1998 Nick Clifton <nickc@cygnus.com>
* config/arm/arm.h (TARGET_SWITCHES): Add --help documentation. * config/arm/arm.h (TARGET_SWITCHES): Add --help documentation.
......
gcc/config/arm/arm.h
...@@ -301,7 +301,7 @@ extern char *target_fp_name; ...@@ -301,7 +301,7 @@ extern char *target_fp_name;
#define ARM_FLAG_BIG_END (0x0800) #define ARM_FLAG_BIG_END (0x0800)
/* Nonzero if we should compile for Thumb interworking. */ /* Nonzero if we should compile for Thumb interworking. */
#define ARM_FLAG_THUMB (0x1000) #define ARM_FLAG_THUMB (0x1000)
/* Nonzero if we should have little-endian words even when compiling for /* Nonzero if we should have little-endian words even when compiling for
big-endian (for backwards compatibility with older versions of GCC). */ big-endian (for backwards compatibility with older versions of GCC). */
...@@ -331,33 +331,47 @@ extern char *target_fp_name; ...@@ -331,33 +331,47 @@ extern char *target_fp_name;
#define TARGET_SWITCHES \ #define TARGET_SWITCHES \
{ \ { \
{"apcs", ARM_FLAG_APCS_FRAME}, \ {"apcs", ARM_FLAG_APCS_FRAME, "" }, \
{"apcs-frame", ARM_FLAG_APCS_FRAME, "Generate APCS conformant stack frames" }, \ {"apcs-frame", ARM_FLAG_APCS_FRAME, \
{"no-apcs-frame", -ARM_FLAG_APCS_FRAME}, \ "Generate APCS conformant stack frames" }, \
{"poke-function-name", ARM_FLAG_POKE}, \ {"no-apcs-frame", -ARM_FLAG_APCS_FRAME, "" }, \
{"fpe", ARM_FLAG_FPE}, \ {"poke-function-name", ARM_FLAG_POKE, \
{"6", ARM_FLAG_ARM6}, \ "Store function names in object code" }, \
{"2", ARM_FLAG_ARM3}, \ {"fpe", ARM_FLAG_FPE, "" }, \
{"3", ARM_FLAG_ARM3}, \ {"6", ARM_FLAG_ARM6, "" }, \
{"apcs-32", ARM_FLAG_APCS_32, "Use the 32bit version of the APCS" }, \ {"2", ARM_FLAG_ARM3, "" }, \
{"apcs-26", -ARM_FLAG_APCS_32, "Use the 26bit version of the APCS" }, \ {"3", ARM_FLAG_ARM3, "" }, \
{"apcs-stack-check", ARM_FLAG_APCS_STACK}, \ {"apcs-32", ARM_FLAG_APCS_32, \
{"no-apcs-stack-check", -ARM_FLAG_APCS_STACK}, \ "Use the 32bit version of the APCS" }, \
{"apcs-float", ARM_FLAG_APCS_FLOAT, "Pass FP arguments in FP registers" }, \ {"apcs-26", -ARM_FLAG_APCS_32, \
{"no-apcs-float", -ARM_FLAG_APCS_FLOAT}, \ "Use the 26bit version of the APCS" }, \
{"apcs-reentrant", ARM_FLAG_APCS_REENT, "Generate re-entrant, PIC code" }, \ {"apcs-stack-check", ARM_FLAG_APCS_STACK, "" }, \
{"no-apcs-reentrant", -ARM_FLAG_APCS_REENT}, \ {"no-apcs-stack-check", -ARM_FLAG_APCS_STACK, "" }, \
{"short-load-bytes", ARM_FLAG_SHORT_BYTE, "Load shorts a byte at a time" }, \ {"apcs-float", ARM_FLAG_APCS_FLOAT, \
{"no-short-load-bytes", -ARM_FLAG_SHORT_BYTE}, \ "Pass FP arguments in FP registers" }, \
{"short-load-words", -ARM_FLAG_SHORT_BYTE, "Load words a byte at a time" }, \ {"no-apcs-float", -ARM_FLAG_APCS_FLOAT, "" }, \
{"no-short-load-words", ARM_FLAG_SHORT_BYTE}, \ {"apcs-reentrant", ARM_FLAG_APCS_REENT, \
{"soft-float", ARM_FLAG_SOFT_FLOAT, "Use library calls to perform FP operations" }, \ "Generate re-entrant, PIC code" }, \
{"hard-float", -ARM_FLAG_SOFT_FLOAT, "Use hardware floating point instructions" }, \ {"no-apcs-reentrant", -ARM_FLAG_APCS_REENT, "" }, \
{"big-endian", ARM_FLAG_BIG_END, "Assume target CPU is configured as big endian" }, \ {"short-load-bytes", ARM_FLAG_SHORT_BYTE, \
{"little-endian", -ARM_FLAG_BIG_END, "Assume target CPU is configured as little endian" }, \ "Load shorts a byte at a time" }, \
{"words-little-endian", ARM_FLAG_LITTLE_WORDS, "Assume big endian bytes, little endian words" }, \ {"no-short-load-bytes", -ARM_FLAG_SHORT_BYTE, "" }, \
{"thumb-interwork", ARM_FLAG_THUMB, "Support calls between THUMB and ARM instructions sets" }, \ {"short-load-words", -ARM_FLAG_SHORT_BYTE, \
{"no-thumb-interwork", -ARM_FLAG_THUMB}, \ "Load words a byte at a time" }, \
{"no-short-load-words", ARM_FLAG_SHORT_BYTE, "" }, \
{"soft-float", ARM_FLAG_SOFT_FLOAT, \
"Use library calls to perform FP operations" }, \
{"hard-float", -ARM_FLAG_SOFT_FLOAT, \
"Use hardware floating point instructions" }, \
{"big-endian", ARM_FLAG_BIG_END, \
"Assume target CPU is configured as big endian" }, \
{"little-endian", -ARM_FLAG_BIG_END, \
"Assume target CPU is configured as little endian" }, \
{"words-little-endian", ARM_FLAG_LITTLE_WORDS, \
"Assume big endian bytes, little endian words" }, \
{"thumb-interwork", ARM_FLAG_THUMB, \
"Support calls between THUMB and ARM instructions sets" }, \
{"no-thumb-interwork", -ARM_FLAG_THUMB, "" }, \
SUBTARGET_SWITCHES \ SUBTARGET_SWITCHES \
{"", TARGET_DEFAULT } \ {"", TARGET_DEFAULT } \
} }
...@@ -366,7 +380,7 @@ extern char *target_fp_name; ...@@ -366,7 +380,7 @@ extern char *target_fp_name;
{ \ { \
{"cpu=", & arm_select[1].string, "Specify the name of the target CPU" }, \ {"cpu=", & arm_select[1].string, "Specify the name of the target CPU" }, \
{"arch=", & arm_select[2].string, "Specify the name of the target architecture" }, \ {"arch=", & arm_select[2].string, "Specify the name of the target architecture" }, \
{"tune=", & arm_select[3].string}, \ {"tune=", & arm_select[3].string, "" }, \
{"fp=", & target_fp_name, "Specify the version of the floating point emulator"} \ {"fp=", & target_fp_name, "Specify the version of the floating point emulator"} \
} }
......
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