Correct expand_vec_perm_blend in i386.c for V8HImode merge.

gcc/

2010-02-26  Uros Bizjak  <ubizjak@gmail.com>

	PR target/43175
	* config/i386/i386.c (expand_vec_perm_blend): Use correct
	operands in V8HImode subregs.  Fix operand order in VEC_MERGE
	rtx.

gcc/testsuite/

2010-02-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/43175
	* gcc.target/i386/vperm-v4si-2-sse4.c: New.

From-SVN: r157087

gcc/ChangeLog

+2010-02-26  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/43175
+	* config/i386/i386.c (expand_vec_perm_blend): Use correct
+	operands in V8HImode subregs.  Fix operand order in VEC_MERGE
+	rtx.
+
 2010-02-26  Jan Kratochvil  <jan.kratochvil@redhat.com>
 
 	* doc/invoke.texi (-fvar-tracking-assignments): Fix typo.

gcc/config/i386/i386.c

@@ -29144,8 +29144,8 @@ expand_vec_perm_blend (struct expand_vec_perm_d *d)
     do_subreg:
       vmode = V8HImode;
       target = gen_lowpart (vmode, target);
-      op0 = gen_lowpart (vmode, target);
-      op1 = gen_lowpart (vmode, target);
+      op0 = gen_lowpart (vmode, op0);
+      op1 = gen_lowpart (vmode, op1);
       break;
 
     default:
@@ -29153,7 +29153,7 @@ expand_vec_perm_blend (struct expand_vec_perm_d *d)
     }
 
   /* This matches five different patterns with the different modes.  */
-  x = gen_rtx_VEC_MERGE (vmode, op0, op1, GEN_INT (mask));
+  x = gen_rtx_VEC_MERGE (vmode, op1, op0, GEN_INT (mask));
   x = gen_rtx_SET (VOIDmode, target, x);
   emit_insn (x);
 

gcc/testsuite/ChangeLog

+2010-02-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/43175
+	* gcc.target/i386/vperm-v4si-2-sse4.c: New.
+
 2010-02-25  Eric Botcazou  <ebotcazou@adacore.com>
 
 	* g++.dg/abi/packed1.C: Expect warning on the SPARC.

gcc/testsuite/gcc.target/i386/vperm-v4si-2-sse4.c

+/* { dg-do run } */
+/* { dg-require-effective-target sse4 } */
+/* { dg-options "-O -msse4" } */
+#include "vperm-v4si-2.c"