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riscv-gcc-1
Commit 7c6b971d by Jan Hubicka Committed by Jan Hubicka
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i386.md (QImode patterns): Remove '*' before the 'r' constraints. 

	* i386.md (QImode patterns): Remove '*' before the 'r' constraints.
	* i386.h (procesor_costs): Add movzbl_load field.
	(HARD_REGNO_MODE_OK): Accept QImode on non PARTIAL_REGISTER_STALL in
	non-Q registers, accept DImode registers anywhere.
	(Q_CLASS_P): New.
	(MEMORY_MOVE_COST): Calculate QImode moves correctly.
	* i386.c (*_cost): Set value for movxbl_load field.

From-SVN: r30746
parent 1c27d4b2
Showing with 42 additions and 21 deletions
gcc/ChangeLog
Fri Nov 26 10:59:12 CET 1999 Jan Hubicka <hubicka@freesoft.cz> Fri Nov 26 10:59:12 CET 1999 Jan Hubicka <hubicka@freesoft.cz>
* i386.md (QImode patterns): Remove '*' before the 'r' constraints.
* i386.h (procesor_costs): Add movzbl_load field.
(HARD_REGNO_MODE_OK): Accept QImode on non PARTIAL_REGISTER_STALL in
non-Q registers, accept DImode registers anywhere.
(Q_CLASS_P): New.
(MEMORY_MOVE_COST): Calculate QImode moves correctly.
* i386.c (*_cost): Set value for movxbl_load field.
* (addsi): New add to lea splitter. * (addsi): New add to lea splitter.
(ashlsi): Likewise. (ashlsi): Likewise.
(lea to add/shift peep2): New. (lea to add/shift peep2): New.
......
gcc/config/i386/i386.c
...@@ -64,6 +64,7 @@ struct processor_costs i386_cost = { /* 386 specific costs */ ...@@ -64,6 +64,7 @@ struct processor_costs i386_cost = { /* 386 specific costs */
1, /* cost of multiply per each bit set */ 1, /* cost of multiply per each bit set */
23, /* cost of a divide/mod */ 23, /* cost of a divide/mod */
15, /* "large" insn */ 15, /* "large" insn */
4, /* cost for loading QImode using movzbl */
{2, 4, 2}, /* cost of loading integer registers {2, 4, 2}, /* cost of loading integer registers
in QImode, HImode and SImode. in QImode, HImode and SImode.
Relative to reg-reg move (2). */ Relative to reg-reg move (2). */
...@@ -83,6 +84,7 @@ struct processor_costs i486_cost = { /* 486 specific costs */ ...@@ -83,6 +84,7 @@ struct processor_costs i486_cost = { /* 486 specific costs */
1, /* cost of multiply per each bit set */ 1, /* cost of multiply per each bit set */
40, /* cost of a divide/mod */ 40, /* cost of a divide/mod */
15, /* "large" insn */ 15, /* "large" insn */
4, /* cost for loading QImode using movzbl */
{2, 4, 2}, /* cost of loading integer registers {2, 4, 2}, /* cost of loading integer registers
in QImode, HImode and SImode. in QImode, HImode and SImode.
Relative to reg-reg move (2). */ Relative to reg-reg move (2). */
...@@ -102,6 +104,7 @@ struct processor_costs pentium_cost = { ...@@ -102,6 +104,7 @@ struct processor_costs pentium_cost = {
0, /* cost of multiply per each bit set */ 0, /* cost of multiply per each bit set */
25, /* cost of a divide/mod */ 25, /* cost of a divide/mod */
8, /* "large" insn */ 8, /* "large" insn */
6, /* cost for loading QImode using movzbl */
{2, 4, 2}, /* cost of loading integer registers {2, 4, 2}, /* cost of loading integer registers
in QImode, HImode and SImode. in QImode, HImode and SImode.
Relative to reg-reg move (2). */ Relative to reg-reg move (2). */
...@@ -121,6 +124,7 @@ struct processor_costs pentiumpro_cost = { ...@@ -121,6 +124,7 @@ struct processor_costs pentiumpro_cost = {
0, /* cost of multiply per each bit set */ 0, /* cost of multiply per each bit set */
17, /* cost of a divide/mod */ 17, /* cost of a divide/mod */
8, /* "large" insn */ 8, /* "large" insn */
2, /* cost for loading QImode using movzbl */
{4, 4, 4}, /* cost of loading integer registers {4, 4, 4}, /* cost of loading integer registers
in QImode, HImode and SImode. in QImode, HImode and SImode.
Relative to reg-reg move (2). */ Relative to reg-reg move (2). */
...@@ -140,6 +144,7 @@ struct processor_costs k6_cost = { ...@@ -140,6 +144,7 @@ struct processor_costs k6_cost = {
0, /* cost of multiply per each bit set */ 0, /* cost of multiply per each bit set */
18, /* cost of a divide/mod */ 18, /* cost of a divide/mod */
8, /* "large" insn */ 8, /* "large" insn */
3, /* cost for loading QImode using movzbl */
{4, 5, 4}, /* cost of loading integer registers {4, 5, 4}, /* cost of loading integer registers
in QImode, HImode and SImode. in QImode, HImode and SImode.
Relative to reg-reg move (2). */ Relative to reg-reg move (2). */
......
gcc/config/i386/i386.h
...@@ -62,6 +62,7 @@ struct processor_costs { ...@@ -62,6 +62,7 @@ struct processor_costs {
int mult_bit; /* cost of multiply per each bit set */ int mult_bit; /* cost of multiply per each bit set */
int divide; /* cost of a divide/mod */ int divide; /* cost of a divide/mod */
int large_insn; /* insns larger than this cost more */ int large_insn; /* insns larger than this cost more */
int movzbl_load; /* cost of loading using movzbl */
int int_load[3]; /* cost of loading integer registers int int_load[3]; /* cost of loading integer registers
in QImode, HImode and SImode relative in QImode, HImode and SImode relative
to reg-reg move (2). */ to reg-reg move (2). */
...@@ -704,13 +705,11 @@ extern int ix86_arch; ...@@ -704,13 +705,11 @@ extern int ix86_arch;
? ((GET_MODE_CLASS (MODE) == MODE_FLOAT \ ? ((GET_MODE_CLASS (MODE) == MODE_FLOAT \
|| GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \ || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
&& GET_MODE_UNIT_SIZE (MODE) <= (LONG_DOUBLE_TYPE_SIZE == 96 ? 12 : 8))\ && GET_MODE_UNIT_SIZE (MODE) <= (LONG_DOUBLE_TYPE_SIZE == 96 ? 12 : 8))\
/* Only allow DImode in even registers. */ \
: (MODE) == DImode && ((REGNO) & 1) ? 0 \
/* The first four integer regs can hold any mode. */ \
: (REGNO) < 4 ? 1 \ : (REGNO) < 4 ? 1 \
/* Other regs cannot do byte accesses. */ \ /* Other regs cannot do byte accesses. */ \
: (MODE) != QImode ? 1 \ : (MODE) != QImode ? 1 \
: reload_in_progress || reload_completed) : reload_in_progress || reload_completed \
|| !TARGET_PARTIAL_REG_STALL)
/* Value is 1 if it is a good idea to tie two pseudo registers /* Value is 1 if it is a good idea to tie two pseudo registers
when one has mode MODE1 and one has mode MODE2. when one has mode MODE1 and one has mode MODE2.
...@@ -843,6 +842,8 @@ enum reg_class ...@@ -843,6 +842,8 @@ enum reg_class
#define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS)) #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
#define Q_CLASS_P(CLASS) (reg_class_subset_p (CLASS, Q_REGS))
/* Give names of register classes as strings for dump file. */ /* Give names of register classes as strings for dump file. */
#define REG_CLASS_NAMES \ #define REG_CLASS_NAMES \
...@@ -1993,7 +1994,11 @@ while (0) ...@@ -1993,7 +1994,11 @@ while (0)
If moving between registers and memory is more expensive than If moving between registers and memory is more expensive than
between two registers, you should define this macro to express the between two registers, you should define this macro to express the
relative cost. */ relative cost.
Model also increased moving costs of QImode registers in non
Q_REGS classes.
*/
#define MEMORY_MOVE_COST(MODE,CLASS,IN) \ #define MEMORY_MOVE_COST(MODE,CLASS,IN) \
(FLOAT_CLASS_P (CLASS) \ (FLOAT_CLASS_P (CLASS) \
...@@ -2003,7 +2008,10 @@ while (0) ...@@ -2003,7 +2008,10 @@ while (0)
? (IN ? ix86_cost->fp_load[1] : ix86_cost->fp_store[1]) \ ? (IN ? ix86_cost->fp_load[1] : ix86_cost->fp_store[1]) \
: (IN ? ix86_cost->fp_load[2] : ix86_cost->fp_store[2]))) \ : (IN ? ix86_cost->fp_load[2] : ix86_cost->fp_store[2]))) \
: (GET_MODE_SIZE (MODE)==1 \ : (GET_MODE_SIZE (MODE)==1 \
? (IN ? ix86_cost->int_load[0] : ix86_cost->int_store[0]) \ ? (IN ? (Q_CLASS_P (CLASS) ? ix86_cost->int_load[0] \
: ix86_cost->movzbl_load) \
: (Q_CLASS_P (CLASS) ? ix86_cost->int_store[0] \
: ix86_cost->int_store[0] + 4)) \
: (GET_MODE_SIZE (MODE)==2 \ : (GET_MODE_SIZE (MODE)==2 \
? (IN ? ix86_cost->int_load[1] : ix86_cost->int_store[1]) \ ? (IN ? ix86_cost->int_load[1] : ix86_cost->int_store[1]) \
: ((IN ? ix86_cost->int_load[2] : ix86_cost->int_store[2]) \ : ((IN ? ix86_cost->int_load[2] : ix86_cost->int_store[2]) \
......
gcc/config/i386/i386.md
...@@ -1348,8 +1348,8 @@ ...@@ -1348,8 +1348,8 @@
(set_attr "length_prefix" "1")]) (set_attr "length_prefix" "1")])
(define_insn "*movqi_1" (define_insn "*movqi_1"
[(set (match_operand:QI 0 "nonimmediate_operand" "=q,q,*r,*r,m") [(set (match_operand:QI 0 "nonimmediate_operand" "=q,q,r,?r,m")
(match_operand:QI 1 "general_operand" "qn,qm,*rn,qm,qn"))] (match_operand:QI 1 "general_operand" "qn,qm,rn,qm,qn"))]
"GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM" "GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
"* "*
{ {
...@@ -1454,8 +1454,8 @@ ...@@ -1454,8 +1454,8 @@
[(set_attr "type" "imovx")]) [(set_attr "type" "imovx")])
(define_insn "*movqi_extv_1" (define_insn "*movqi_extv_1"
[(set (match_operand:QI 0 "nonimmediate_operand" "=qm*r") [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,?r")
(sign_extract:QI (match_operand:SI 1 "register_operand" "q") (sign_extract:QI (match_operand:SI 1 "register_operand" "q,q")
(const_int 8) (const_int 8)
(const_int 8)))] (const_int 8)))]
"" ""
...@@ -1487,8 +1487,8 @@ ...@@ -1487,8 +1487,8 @@
[(set_attr "type" "imovx")]) [(set_attr "type" "imovx")])
(define_insn "*movqi_extzv_1" (define_insn "*movqi_extzv_1"
[(set (match_operand:QI 0 "nonimmediate_operand" "=qm*r") [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,?r")
(subreg:QI (zero_extract:SI (match_operand 1 "ext_register_operand" "q") (subreg:QI (zero_extract:SI (match_operand 1 "ext_register_operand" "q,q")
(const_int 8) (const_int 8)
(const_int 8)) 0))] (const_int 8)) 0))]
"" ""
...@@ -3295,9 +3295,9 @@ ...@@ -3295,9 +3295,9 @@
;; %%% Potential partial reg stall on alternative 2. What to do? ;; %%% Potential partial reg stall on alternative 2. What to do?
(define_insn "*addqi_1" (define_insn "*addqi_1"
[(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,*r") [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,r")
(plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0") (plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:QI 2 "general_operand" "qn,qmn,*rn"))) (match_operand:QI 2 "general_operand" "qn,qmn,rn")))
(clobber (reg:CC 17))] (clobber (reg:CC 17))]
"ix86_binary_operator_ok (PLUS, QImode, operands)" "ix86_binary_operator_ok (PLUS, QImode, operands)"
"* "*
...@@ -4366,9 +4366,9 @@ ...@@ -4366,9 +4366,9 @@
;; %%% Potential partial reg stall on alternative 2. What to do? ;; %%% Potential partial reg stall on alternative 2. What to do?
(define_insn "*andqi_1" (define_insn "*andqi_1"
[(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,*r") [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,r")
(and:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0") (and:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:QI 2 "general_operand" "qi,qmi,*ri"))) (match_operand:QI 2 "general_operand" "qi,qmi,ri")))
(clobber (reg:CC 17))] (clobber (reg:CC 17))]
"ix86_binary_operator_ok (AND, QImode, operands)" "ix86_binary_operator_ok (AND, QImode, operands)"
"@ "@
...@@ -4554,9 +4554,9 @@ ...@@ -4554,9 +4554,9 @@
;; %%% Potential partial reg stall on alternative 2. What to do? ;; %%% Potential partial reg stall on alternative 2. What to do?
(define_insn "*iorqi_1" (define_insn "*iorqi_1"
[(set (match_operand:QI 0 "nonimmediate_operand" "=q,m,*r") [(set (match_operand:QI 0 "nonimmediate_operand" "=q,m,r")
(ior:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0") (ior:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:QI 2 "general_operand" "qmi,qi,*ri"))) (match_operand:QI 2 "general_operand" "qmi,qi,ri")))
(clobber (reg:CC 17))] (clobber (reg:CC 17))]
"ix86_binary_operator_ok (IOR, QImode, operands)" "ix86_binary_operator_ok (IOR, QImode, operands)"
"@ "@
...@@ -4659,9 +4659,9 @@ ...@@ -4659,9 +4659,9 @@
;; %%% Potential partial reg stall on alternative 2. What to do? ;; %%% Potential partial reg stall on alternative 2. What to do?
(define_insn "*xorqi_1" (define_insn "*xorqi_1"
[(set (match_operand:QI 0 "nonimmediate_operand" "=q,m,*r") [(set (match_operand:QI 0 "nonimmediate_operand" "=q,m,r")
(xor:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0") (xor:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:QI 2 "general_operand" "qmi,qi,*ri"))) (match_operand:QI 2 "general_operand" "qmi,qi,ri")))
(clobber (reg:CC 17))] (clobber (reg:CC 17))]
"ix86_binary_operator_ok (XOR, QImode, operands)" "ix86_binary_operator_ok (XOR, QImode, operands)"
"@ "@
...@@ -5301,7 +5301,7 @@ ...@@ -5301,7 +5301,7 @@
"ix86_expand_unary_operator (NOT, QImode, operands); DONE;") "ix86_expand_unary_operator (NOT, QImode, operands); DONE;")
(define_insn "*one_cmplqi2_1" (define_insn "*one_cmplqi2_1"
[(set (match_operand:QI 0 "nonimmediate_operand" "=qm,*r") [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,r")
(not:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")))] (not:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")))]
"ix86_unary_operator_ok (NEG, QImode, operands)" "ix86_unary_operator_ok (NEG, QImode, operands)"
"@ "@
......
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