Commit 7c61657f by Richard Sandiford Committed by Richard Sandiford

[25/77] Use is_a <scalar_int_mode> for bitmask optimisations

Explicitly check for scalar_int_mode in code that maps arithmetic
to full-mode bit operations.  These operations wouldn't work correctly
for vector modes, for example.  In many cases this is enforced also by
checking whether an operand is CONST_INT_P, but there were other cases
where the condition is more indirect.

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* combine.c (combine_simplify_rtx): Add checks for
	is_a <scalar_int_mode>.
	(simplify_if_then_else): Likewise.
	(make_field_assignment): Likewise.
	(simplify_comparison): Likewise.
	* ifcvt.c (noce_try_bitop): Likewise.
	* loop-invariant.c (canonicalize_address_mult): Likewise.
	* simplify-rtx.c (simplify_unary_operation_1): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r251477
parent 64ab8765
......@@ -2,6 +2,19 @@
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* combine.c (combine_simplify_rtx): Add checks for
is_a <scalar_int_mode>.
(simplify_if_then_else): Likewise.
(make_field_assignment): Likewise.
(simplify_comparison): Likewise.
* ifcvt.c (noce_try_bitop): Likewise.
* loop-invariant.c (canonicalize_address_mult): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* simplify-rtx.c (simplify_binary_operation_1): Use
is_a <scalar_int_mode> instead of !VECTOR_MODE_P.
......
......@@ -2808,7 +2808,7 @@ noce_try_bitop (struct noce_if_info *if_info)
{
rtx cond, x, a, result;
rtx_insn *seq;
machine_mode mode;
scalar_int_mode mode;
enum rtx_code code;
int bitnum;
......@@ -2816,6 +2816,10 @@ noce_try_bitop (struct noce_if_info *if_info)
cond = if_info->cond;
code = GET_CODE (cond);
/* Check for an integer operation. */
if (!is_a <scalar_int_mode> (GET_MODE (x), &mode))
return FALSE;
if (!noce_simple_bbs (if_info))
return FALSE;
......@@ -2838,7 +2842,6 @@ noce_try_bitop (struct noce_if_info *if_info)
|| ! rtx_equal_p (x, XEXP (cond, 0)))
return FALSE;
bitnum = INTVAL (XEXP (cond, 2));
mode = GET_MODE (x);
if (BITS_BIG_ENDIAN)
bitnum = GET_MODE_BITSIZE (mode) - 1 - bitnum;
if (bitnum < 0 || bitnum >= HOST_BITS_PER_WIDE_INT)
......
......@@ -774,16 +774,16 @@ canonicalize_address_mult (rtx x)
FOR_EACH_SUBRTX_VAR (iter, array, x, NONCONST)
{
rtx sub = *iter;
if (GET_CODE (sub) == ASHIFT
scalar_int_mode sub_mode;
if (is_a <scalar_int_mode> (GET_MODE (sub), &sub_mode)
&& GET_CODE (sub) == ASHIFT
&& CONST_INT_P (XEXP (sub, 1))
&& INTVAL (XEXP (sub, 1)) < GET_MODE_BITSIZE (GET_MODE (sub))
&& INTVAL (XEXP (sub, 1)) < GET_MODE_BITSIZE (sub_mode)
&& INTVAL (XEXP (sub, 1)) >= 0)
{
HOST_WIDE_INT shift = INTVAL (XEXP (sub, 1));
PUT_CODE (sub, MULT);
XEXP (sub, 1) = gen_int_mode (HOST_WIDE_INT_1 << shift,
GET_MODE (sub));
XEXP (sub, 1) = gen_int_mode (HOST_WIDE_INT_1 << shift, sub_mode);
iter.skip_subrtxes ();
}
}
......
......@@ -925,7 +925,7 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op)
{
enum rtx_code reversed;
rtx temp;
scalar_int_mode inner;
scalar_int_mode inner, int_mode;
switch (code)
{
......@@ -986,10 +986,11 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op)
minus 1 is (ge foo (const_int 0)) if STORE_FLAG_VALUE is -1,
so we can perform the above simplification. */
if (STORE_FLAG_VALUE == -1
&& is_a <scalar_int_mode> (mode, &int_mode)
&& GET_CODE (op) == ASHIFTRT
&& CONST_INT_P (XEXP (op, 1))
&& INTVAL (XEXP (op, 1)) == GET_MODE_PRECISION (mode) - 1)
return simplify_gen_relational (GE, mode, VOIDmode,
&& INTVAL (XEXP (op, 1)) == GET_MODE_PRECISION (int_mode) - 1)
return simplify_gen_relational (GE, int_mode, VOIDmode,
XEXP (op, 0), const0_rtx);
......@@ -1339,8 +1340,10 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op)
return op;
/* If operand is known to be only -1 or 0, convert ABS to NEG. */
if (num_sign_bit_copies (op, mode) == GET_MODE_PRECISION (mode))
return gen_rtx_NEG (mode, op);
if (is_a <scalar_int_mode> (mode, &int_mode)
&& (num_sign_bit_copies (op, int_mode)
== GET_MODE_PRECISION (int_mode)))
return gen_rtx_NEG (int_mode, op);
break;
......@@ -1494,12 +1497,13 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op)
is similarly (zero_extend:M (subreg:O <X>)). */
if ((GET_CODE (op) == ASHIFTRT || GET_CODE (op) == LSHIFTRT)
&& GET_CODE (XEXP (op, 0)) == ASHIFT
&& is_a <scalar_int_mode> (mode, &int_mode)
&& CONST_INT_P (XEXP (op, 1))
&& XEXP (XEXP (op, 0), 1) == XEXP (op, 1)
&& GET_MODE_BITSIZE (GET_MODE (op)) > INTVAL (XEXP (op, 1)))
{
scalar_int_mode tmode;
gcc_assert (GET_MODE_BITSIZE (mode)
gcc_assert (GET_MODE_BITSIZE (int_mode)
> GET_MODE_BITSIZE (GET_MODE (op)));
if (int_mode_for_size (GET_MODE_BITSIZE (GET_MODE (op))
- INTVAL (XEXP (op, 1)), 1).exists (&tmode))
......@@ -1509,7 +1513,7 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op)
if (inner)
return simplify_gen_unary (GET_CODE (op) == ASHIFTRT
? SIGN_EXTEND : ZERO_EXTEND,
mode, inner, tmode);
int_mode, inner, tmode);
}
}
......@@ -1610,6 +1614,7 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op)
GET_MODE_PRECISION (N) - I bits. */
if (GET_CODE (op) == LSHIFTRT
&& GET_CODE (XEXP (op, 0)) == ASHIFT
&& is_a <scalar_int_mode> (mode, &int_mode)
&& CONST_INT_P (XEXP (op, 1))
&& XEXP (XEXP (op, 0), 1) == XEXP (op, 1)
&& GET_MODE_PRECISION (GET_MODE (op)) > INTVAL (XEXP (op, 1)))
......@@ -1621,7 +1626,8 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op)
rtx inner =
rtl_hooks.gen_lowpart_no_emit (tmode, XEXP (XEXP (op, 0), 0));
if (inner)
return simplify_gen_unary (ZERO_EXTEND, mode, inner, tmode);
return simplify_gen_unary (ZERO_EXTEND, int_mode,
inner, tmode);
}
}
......
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