re PR target/50457 (SH2A atomic functions)

	PR target/50457
	* config/sh/sh.opt (matomic-model): New option.
	(msoft-atomic): Mark as deprecated and alias to matomic-model=soft-gusa.
	(mhard-atomic): Delete.
	* config/sh/predicates.md (gbr_displacement): New predicate.
	* config/sh/sh-protos.h (sh_atomic_model): New struct.
	(selected_atomic_model): New declaration.
	(TARGET_ATOMIC_ANY, TARGET_ATOMIC_STRICT, TARGET_ATOMIC_SOFT_GUSA,
	TARGET_ATOMIC_HARD_LLCS, TARGET_ATOMIC_SOFT_TCB,
	TARGET_ATOMIC_SOFT_TCB_GBR_OFFSET_RTX, TARGET_ATOMIC_SOFT_IMASK):
	New macros.
	* config/sh/linux.h (SUBTARGET_OVERRIDE_OPTIONS): Adapt setting to
	default atomic model.
	* config/sh/sh.c (selected_atomic_model_): New global variable.
	(selected_atomic_model, parse_validate_atomic_model_option): New
	functions.
	(sh_option_override): Replace atomic selection checks with call to
	parse_validate_atomic_model_option.
	* config/sh/sh.h (TARGET_ANY_ATOMIC, UNSUPPORTED_ATOMIC_OPTIONS,
	UNSUPPORTED_HARD_ATOMIC_CPU): Delete.
	(DRIVER_SELF_SPECS): Remove atomic checks.
	config/sh/sync.md: Update documentation comments.
	(atomic_compare_and_swap<mode>, atomic_exchange<mode>,
	atomic_fetch_<fetchop_name><mode>, atomic_fetch_nand<mode>,
	atomic_<fetchop_name>_fetch<mode>, atomic_nand_fetch<mode>): Use
	TARGET_ATOMIC_ANY as condition.  Add TARGET_ATOMIC_STRICT check for
	SH4A case.  Handle new TARGET_ATOMIC_SOFT_TCB and
	TARGET_ATOMIC_SOFT_IMASK cases.
	(atomic_test_and_set): Handle new TARGET_ATOMIC_SOFT_TCB and
	TARGET_ATOMIC_SOFT_IMASK cases.
	(atomic_compare_and_swapsi_hard, atomic_exchangesi_hard,
	atomic_fetch_<fetchop_name>si_hard, atomic_fetch_nandsi_hard,
	atomic_<fetchop_name>_fetchsi_hard, atomic_nand_fetchsi_hard):
	Add TARGET_ATOMIC_STRICT check.
	(atomic_compare_and_swap<mode>_hard, atomic_exchange<mode>_hard,
	atomic_fetch_<fetchop_name><mode>_hard, atomic_fetch_nand<mode>_hard,
	atomic_<fetchop_name>_fetch<mode>_hard, atomic_nand_fetch<mode>_hard,
	atomic_test_and_set_hard): Use TARGET_ATOMIC_HARD_LLCS condition.
	(atomic_compare_and_swap<mode>_soft, atomic_exchange<mode>_soft,
	atomic_fetch_<fetchop_name><mode>_soft, atomic_fetch_nand<mode>_soft,
	atomic_<fetchop_name>_fetch<mode>_soft, atomic_nand_fetch<mode>_soft,
	atomic_test_and_set_soft): Append _gusa to the insn names and use
	TARGET_ATOMIC_SOFT_GUSA as condition.
	(atomic_compare_and_swap<mode>_soft_tcb, atomic_exchange<mode>_soft_tcb,
	atomic_fetch_<fetchop_name><mode>_soft_tcb,
	atomic_fetch_nand<mode>_soft_tcb,
	atomic_<fetchop_name>_fetch<mode>_soft_tcb,
	atomic_nand_fetch<mode>_soft_tcb, atomic_test_and_set_soft_tcb):
	New insns.
	(atomic_compare_and_swap<mode>_soft_imask,
	atomic_exchange<mode>_soft_imask,
	atomic_fetch_<fetchop_name><mode>_soft_imask,
	atomic_fetch_nand<mode>_soft_imask,
	atomic_<fetchop_name>_fetch<mode>_soft_imask,
	atomic_nand_fetch<mode>_soft_imask, atomic_test_and_set_soft_imask):
	New insns.
	* doc/invoke.texi (SH Options): Document new matomic-model option.
	Remove msoft-atomic and mhard-atomic options.

From-SVN: r191899

gcc/ChangeLog

+2012-10-01  Oleg Endo  <olegendo@gcc.gnu.org>
+
+	PR target/50457
+	* config/sh/sh.opt (matomic-model): New option.
+	(msoft-atomic): Mark as deprecated and alias to matomic-model=soft-gusa.
+	(mhard-atomic): Delete.
+	* config/sh/predicates.md (gbr_displacement): New predicate.
+	* config/sh/sh-protos.h (sh_atomic_model): New struct.
+	(selected_atomic_model): New declaration.
+	(TARGET_ATOMIC_ANY, TARGET_ATOMIC_STRICT, TARGET_ATOMIC_SOFT_GUSA,
+	TARGET_ATOMIC_HARD_LLCS, TARGET_ATOMIC_SOFT_TCB,
+	TARGET_ATOMIC_SOFT_TCB_GBR_OFFSET_RTX, TARGET_ATOMIC_SOFT_IMASK):
+	New macros.
+	* config/sh/linux.h (SUBTARGET_OVERRIDE_OPTIONS): Adapt setting to
+	default atomic model.
+	* config/sh/sh.c (selected_atomic_model_): New global variable.
+	(selected_atomic_model, parse_validate_atomic_model_option): New
+	functions.
+	(sh_option_override): Replace atomic selection checks with call to
+	parse_validate_atomic_model_option.
+	* config/sh/sh.h (TARGET_ANY_ATOMIC, UNSUPPORTED_ATOMIC_OPTIONS,
+	UNSUPPORTED_HARD_ATOMIC_CPU): Delete.
+	(DRIVER_SELF_SPECS): Remove atomic checks.
+	config/sh/sync.md: Update documentation comments.
+	(atomic_compare_and_swap<mode>, atomic_exchange<mode>,
+	atomic_fetch_<fetchop_name><mode>, atomic_fetch_nand<mode>,
+	atomic_<fetchop_name>_fetch<mode>, atomic_nand_fetch<mode>): Use
+	TARGET_ATOMIC_ANY as condition.  Add TARGET_ATOMIC_STRICT check for
+	SH4A case.  Handle new TARGET_ATOMIC_SOFT_TCB and
+	TARGET_ATOMIC_SOFT_IMASK cases.
+	(atomic_test_and_set): Handle new TARGET_ATOMIC_SOFT_TCB and
+	TARGET_ATOMIC_SOFT_IMASK cases.
+	(atomic_compare_and_swapsi_hard, atomic_exchangesi_hard,
+	atomic_fetch_<fetchop_name>si_hard, atomic_fetch_nandsi_hard,
+	atomic_<fetchop_name>_fetchsi_hard, atomic_nand_fetchsi_hard):
+	Add TARGET_ATOMIC_STRICT check.
+	(atomic_compare_and_swap<mode>_hard, atomic_exchange<mode>_hard,
+	atomic_fetch_<fetchop_name><mode>_hard, atomic_fetch_nand<mode>_hard,
+	atomic_<fetchop_name>_fetch<mode>_hard, atomic_nand_fetch<mode>_hard,
+	atomic_test_and_set_hard): Use TARGET_ATOMIC_HARD_LLCS condition.
+	(atomic_compare_and_swap<mode>_soft, atomic_exchange<mode>_soft,
+	atomic_fetch_<fetchop_name><mode>_soft, atomic_fetch_nand<mode>_soft,
+	atomic_<fetchop_name>_fetch<mode>_soft, atomic_nand_fetch<mode>_soft,
+	atomic_test_and_set_soft): Append _gusa to the insn names and use
+	TARGET_ATOMIC_SOFT_GUSA as condition.
+	(atomic_compare_and_swap<mode>_soft_tcb, atomic_exchange<mode>_soft_tcb,
+	atomic_fetch_<fetchop_name><mode>_soft_tcb,
+	atomic_fetch_nand<mode>_soft_tcb,
+	atomic_<fetchop_name>_fetch<mode>_soft_tcb,
+	atomic_nand_fetch<mode>_soft_tcb, atomic_test_and_set_soft_tcb):
+	New insns.
+	(atomic_compare_and_swap<mode>_soft_imask,
+	atomic_exchange<mode>_soft_imask,
+	atomic_fetch_<fetchop_name><mode>_soft_imask,
+	atomic_fetch_nand<mode>_soft_imask,
+	atomic_<fetchop_name>_fetch<mode>_soft_imask,
+	atomic_nand_fetch<mode>_soft_imask, atomic_test_and_set_soft_imask):
+	New insns.
+	* doc/invoke.texi (SH Options): Document new matomic-model option.
+	Remove msoft-atomic and mhard-atomic options.
+
 2012-10-01  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 
 	PR target/54746

gcc/config/sh/linux.h

@@ -138,11 +138,16 @@ along with GCC; see the file COPYING3.  If not see
 #define TARGET_INIT_LIBFUNCS  sh_init_sync_libfuncs
 
 #undef SUBTARGET_OVERRIDE_OPTIONS
-#define SUBTARGET_OVERRIDE_OPTIONS			\
-  do							\
-    {							\
-      /* Defaulting to -msoft-atomic.  */		\
-      if (global_options_set.x_TARGET_SOFT_ATOMIC == 0)	\
-	TARGET_SOFT_ATOMIC = 1;				\
-    }							\
+#define SUBTARGET_OVERRIDE_OPTIONS					\
+  do									\
+    {									\
+      /* Set default atomic model if it hasn't been specified.  */	\
+      if (global_options_set.x_sh_atomic_model_str == 0)		\
+	{								\
+	  if (TARGET_SH3)						\
+	    sh_atomic_model_str = "soft-gusa";				\
+	  else if (TARGET_SH1)						\
+	    sh_atomic_model_str = "soft-imask";				\
+	}								\
+    }									\
   while (0)

gcc/config/sh/predicates.md

@@ -1071,3 +1071,19 @@
 
   return false;
 })
+
+;; A predicate that determines whether a given constant is a valid
+;; displacement for a gbr load/store of the specified mode.
+(define_predicate "gbr_displacement"
+  (match_code "const_int")
+{
+  const int mode_sz = GET_MODE_SIZE (mode);
+  const int move_sz = mode_sz > GET_MODE_SIZE (SImode)
+				? GET_MODE_SIZE (SImode)
+				: mode_sz;
+  int max_disp = 255 * move_sz;
+  if (mode_sz > move_sz)
+    max_disp -= mode_sz - move_sz;
+
+  return INTVAL (op) >= 0 && INTVAL (op) <= max_disp;
+})

gcc/config/sh/sh-protos.h

@@ -37,6 +37,51 @@ enum sh_function_kind {
   SFUNC_STATIC
 };
 
+/* Atomic model.  */
+struct sh_atomic_model
+{
+  enum enum_type
+  {
+    none = 0,
+    soft_gusa,
+    hard_llcs,
+    soft_tcb,
+    soft_imask,
+
+    num_models
+  };
+
+  /*  If strict is set, disallow mixing of different models, as it would
+      happen on SH4A.  */
+  bool strict;
+  enum_type type;
+  int tcb_gbr_offset;
+};
+
+extern const sh_atomic_model& selected_atomic_model (void);
+
+/* Shortcuts to check the currently selected atomic model.  */
+#define TARGET_ATOMIC_ANY \
+  selected_atomic_model ().type != sh_atomic_model::none
+
+#define TARGET_ATOMIC_STRICT \
+  selected_atomic_model ().strict
+
+#define TARGET_ATOMIC_SOFT_GUSA \
+  selected_atomic_model ().type == sh_atomic_model::soft_gusa
+
+#define TARGET_ATOMIC_HARD_LLCS \
+  selected_atomic_model ().type == sh_atomic_model::hard_llcs
+
+#define TARGET_ATOMIC_SOFT_TCB \
+  selected_atomic_model ().type == sh_atomic_model::soft_tcb
+
+#define TARGET_ATOMIC_SOFT_TCB_GBR_OFFSET_RTX \
+  GEN_INT (selected_atomic_model ().tcb_gbr_offset)
+
+#define TARGET_ATOMIC_SOFT_IMASK \
+  selected_atomic_model ().type == sh_atomic_model::soft_imask
+
 #ifdef RTX_CODE
 extern rtx sh_fsca_sf2int (void);
 extern rtx sh_fsca_int2sf (void);

gcc/config/sh/sh.c

@@ -62,6 +62,8 @@ along with GCC; see the file COPYING3.  If not see
 #include "tm-constrs.h"
 #include "opts.h"
 
+#include <sstream>
+#include <vector>
 #include <algorithm>
 
 int code_for_indirect_jump_scratch = CODE_FOR_indirect_jump_scratch;
@@ -596,6 +598,110 @@ static const struct attribute_spec sh_attribute_table[] =
 
 struct gcc_target targetm = TARGET_INITIALIZER;
 
+
+/* Information on the currently selected atomic model.
+   This is initialized in sh_option_override.  */
+static sh_atomic_model selected_atomic_model_;
+
+const sh_atomic_model&
+selected_atomic_model (void)
+{
+  return selected_atomic_model_;
+}
+
+static sh_atomic_model
+parse_validate_atomic_model_option (const char* str)
+{
+  const char* model_names[sh_atomic_model::num_models];
+  model_names[sh_atomic_model::none] = "none";
+  model_names[sh_atomic_model::soft_gusa] = "soft-gusa";
+  model_names[sh_atomic_model::hard_llcs] = "hard-llcs";
+  model_names[sh_atomic_model::soft_tcb] = "soft-tcb";
+  model_names[sh_atomic_model::soft_imask] = "soft-imask";
+
+  sh_atomic_model ret;
+  ret.type = sh_atomic_model::none;
+  ret.strict = false;
+  ret.tcb_gbr_offset = -1;
+
+  /* Handle empty string as 'none'.  */
+  if (str == NULL || *str == '\0')
+    return ret;
+
+#define err_ret(...) do { error (__VA_ARGS__); return ret; } while (0)
+
+  std::vector<std::string> tokens;
+  for (std::stringstream ss (str); ss.good (); )
+  {
+    tokens.push_back (std::string ());
+    std::getline (ss, tokens.back (), ',');
+  }
+
+  if (tokens.empty ())
+    err_ret ("invalid atomic model option");
+
+  /* The first token must be the atomic model name.  */
+  {
+    for (size_t i = 0; i < sh_atomic_model::num_models; ++i)
+      if (tokens.front () == model_names[i])
+	{
+	  ret.type = (sh_atomic_model::enum_type)i;
+	  goto got_mode_name;
+	}
+
+    err_ret ("invalid atomic model name \"%s\"", tokens.front ().c_str ());
+got_mode_name:;
+  }
+
+  /* Go through the remaining tokens.  */
+  for (size_t i = 1; i < tokens.size (); ++i)
+    {
+      if (tokens[i] == "strict")
+	ret.strict = true;
+      else if (tokens[i].find ("gbr-offset=") == 0)
+	{
+	  std::string offset_str = tokens[i].substr (strlen ("gbr-offset="));
+	  ret.tcb_gbr_offset = integral_argument (offset_str.c_str ());
+	  if (offset_str.empty () || ret.tcb_gbr_offset == -1)
+	    err_ret ("could not parse gbr-offset value \"%s\" in atomic model "
+		     "option", offset_str.c_str ());
+	}
+      else
+	err_ret ("unknown parameter \"%s\" in atomic model option",
+	         tokens[i].c_str ());
+    }
+
+  /* Check that the selection makes sense.  */
+  if (TARGET_SHMEDIA && ret.type != sh_atomic_model::none)
+    err_ret ("atomic operations are not supported on SHmedia");
+
+  if (ret.type == sh_atomic_model::soft_gusa && !TARGET_SH3)
+    err_ret ("atomic model %s is only available on SH3 and SH4 targets",
+	     model_names[ret.type]);
+
+  if (ret.type == sh_atomic_model::hard_llcs && !TARGET_SH4A)
+    err_ret ("atomic model %s is only available on SH4A targets",
+	     model_names[ret.type]);
+
+  if (ret.type == sh_atomic_model::soft_tcb && ret.tcb_gbr_offset == -1)
+    err_ret ("atomic model %s requires gbr-offset parameter", 
+	     model_names[ret.type]);
+
+  if (ret.type == sh_atomic_model::soft_tcb
+      && (ret.tcb_gbr_offset < 0 || ret.tcb_gbr_offset > 1020
+          || (ret.tcb_gbr_offset & 3) != 0))
+    err_ret ("invalid gbr-offset value \"%d\" for atomic model %s; it must be "
+	     "a multiple of 4 in the range 0-1020", ret.tcb_gbr_offset,
+	     model_names[ret.type]);
+
+  if (ret.type == sh_atomic_model::soft_imask && TARGET_USERMODE)
+    err_ret ("cannot use atomic model %s in user mode", model_names[ret.type]);
+
+  return ret;
+
+#undef err_ret
+}
+
 /* Implement TARGET_OPTION_OVERRIDE macro.  Validate and override 
    various options, and do some machine dependent initialization.  */
 static void
@@ -907,12 +1013,10 @@ sh_option_override (void)
   if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2))
     flag_strict_volatile_bitfields = 1;
 
-  /* Make sure that only one atomic mode is selected and that the selection
-     is valid for the current target CPU.  */
-  if (TARGET_SOFT_ATOMIC && TARGET_HARD_ATOMIC)
-    error ("-msoft-atomic and -mhard-atomic cannot be used at the same time");
-  if (TARGET_HARD_ATOMIC && ! TARGET_SH4A_ARCH)
-    error ("-mhard-atomic is only available for SH4A targets");
+  /* Parse atomic model option and make sure it is valid for the current
+     target CPU.  */
+  selected_atomic_model_
+    = parse_validate_atomic_model_option (sh_atomic_model_str);
 }
 
 /* Print the operand address in x to the stream.  */

gcc/config/sh/sh.h

@@ -172,9 +172,6 @@ do { \
   (TARGET_SH1 && ! TARGET_SH2E && ! TARGET_SH5 \
    && ! (TARGET_HITACHI || sh_attr_renesas_p (FUN_DECL)))
 
-/* Nonzero if either soft or hard atomics are enabled.  */
-#define TARGET_ANY_ATOMIC (TARGET_SOFT_ATOMIC | TARGET_HARD_ATOMIC)
-
 #ifndef TARGET_CPU_DEFAULT
 #define TARGET_CPU_DEFAULT SELECT_SH1
 #define SUPPORT_SH1 1
@@ -436,20 +433,8 @@ do { \
 "%{m2a*:%eSH2a does not support little-endian}}"
 #endif
 
-#define UNSUPPORTED_ATOMIC_OPTIONS \
-"%{msoft-atomic:%{mhard-atomic:%e-msoft-atomic and -mhard-atomic cannot be \
-used at the same time}}"
-
-#if TARGET_CPU_DEFAULT & MASK_SH4A
-#define UNSUPPORTED_HARD_ATOMIC_CPU ""
-#else
-#define UNSUPPORTED_HARD_ATOMIC_CPU \
-"%{!m4a*:%{mhard-atomic:%e-mhard-atomic is only available for SH4A targets}}"
-#endif
-
 #undef DRIVER_SELF_SPECS
-#define DRIVER_SELF_SPECS UNSUPPORTED_SH2A, UNSUPPORTED_ATOMIC_OPTIONS,\
-			  UNSUPPORTED_HARD_ATOMIC_CPU
+#define DRIVER_SELF_SPECS UNSUPPORTED_SH2A
 
 #define ASSEMBLER_DIALECT assembler_dialect
 

gcc/config/sh/sh.opt

@@ -320,12 +320,12 @@ Target Mask(HITACHI)
 Follow Renesas (formerly Hitachi) / SuperH calling conventions
 
 msoft-atomic
-Target Report Var(TARGET_SOFT_ATOMIC)
-Use gUSA software atomic sequences
+Target Undocumented Alias(matomic-model=, soft-gusa, none)
+Deprecated.  Use -matomic= instead to select the atomic model
 
-mhard-atomic
-Target Report Var(TARGET_HARD_ATOMIC)
-Use hardware atomic sequences
+matomic-model=
+Target Report RejectNegative Joined Var(sh_atomic_model_str)
+Specify the model for atomic operations
 
 mtas
 Target Report RejectNegative Var(TARGET_ENABLE_TAS)

gcc/doc/invoke.texi

@@ -893,7 +893,8 @@ See RS/6000 and PowerPC Options.
 -mspace -mprefergot  -musermode -multcost=@var{number} -mdiv=@var{strategy} @gol
 -mdivsi3_libfunc=@var{name} -mfixed-range=@var{register-range} @gol
 -mindexed-addressing -mgettrcost=@var{number} -mpt-fixed @gol
--maccumulate-outgoing-args -minvalid-symbols -msoft-atomic -mhard-atomic @gol
+-maccumulate-outgoing-args -minvalid-symbols @gol
+-matomic-model=@var{atomic-model} @gol
 -mbranch-cost=@var{num} -mzdcbranch -mno-zdcbranch -mcbranchdi -mcmpeqdi @gol
 -mfused-madd -mno-fused-madd -mfsca -mno-fsca -mfsrra -mno-fsrra @gol
 -mpretend-cmove -mtas}
@@ -18297,26 +18298,67 @@ Dump instruction size and location in the assembly code.
 This option is deprecated.  It pads structures to multiple of 4 bytes,
 which is incompatible with the SH ABI@.
 
-@item -msoft-atomic
-@opindex msoft-atomic
+@item -matomic-model=@var{model}
+@opindex matomic-model=@var{model}
+Sets the model of atomic operations and additional parameters as a comma
+separated list.  For details on the atomic built-in functions see
+@ref{__atomic Builtins}.  The following models and parameters are supported:
+
+@table @samp
+
+@item none
+Disable compiler generated atomic sequences and emit library calls for atomic
+operations.  This is the default if the target is not @code{sh-*-linux*}.
+
+@item soft-gusa
 Generate GNU/Linux compatible gUSA software atomic sequences for the atomic
-built-in functions.  The generated atomic sequences require support from the 
-interrupt / exception handling code of the system and are only suitable for
-single-core systems.  They will not operate correctly on multi-core systems.
-This option is enabled by default when the target is @code{sh-*-linux*}.
-When the target is SH4A, this option will also partially utilize the hardware
-atomic instructions @code{movli.l} and @code{movco.l} to create more
-efficient code.
-For details on the atomic built-in functions see @ref{__atomic Builtins}.
-
-@item -mhard-atomic
-@opindex hard-atomic
-Generate hardware atomic sequences for the atomic built-in functions.  This
-is only available on SH4A and is suitable for multi-core systems.  Code
-compiled with this option will also be compatible with gUSA aware
-interrupt / exception handling systems.  In contrast to the
-@option{-msoft-atomic} option this will only use the instructions
-@code{movli.l} and @code{movco.l} to create atomic sequences.
+built-in functions.  The generated atomic sequences require additional support
+from the interrupt/exception handling code of the system and are only suitable
+for SH3* and SH4* single-core systems.  This option is enabled by default when
+the target is @code{sh-*-linux*} and SH3* or SH4*.  When the target is SH4A,
+this option will also partially utilize the hardware atomic instructions
+@code{movli.l} and @code{movco.l} to create more efficient code, unless
+@samp{strict} is specified.  
+
+@item soft-tcb
+Generate software atomic sequences that use a variable in the thread control
+block.  This is a variation of the gUSA sequences which can also be used on
+SH1* and SH2* targets.  The generated atomic sequences require additional
+support from the interrupt/exception handling code of the system and are only
+suitable for single-core systems.  When using this model, the @samp{gbr-offset=}
+parameter has to be specified as well.
+
+@item soft-imask
+Generate software atomic sequences that temporarily disable interrupts by
+setting @code{SR.IMASK = 1111}.  This model works only when the program runs
+in privileged mode and is only suitable for single-core systems.  Additional
+support from the interrupt/exception handling code of the system is not
+required.  This model is enabled by default when the target is
+@code{sh-*-linux*} and SH1* or SH2*.
+
+@item hard-llcs
+Generate hardware atomic sequences using the @code{movli.l} and @code{movco.l}
+instructions only.  This is only available on SH4A and is suitable for
+multi-core systems.  Since the hardware instructions support only 32 bit atomic
+variables access to 8 or 16 bit variables is emulated with 32 bit accesses.
+Code compiled with this option will also be compatible with other software
+atomic model interrupt/exception handling systems if executed on an SH4A
+system.  Additional support from the interrupt/exception handling code of the
+system is not required for this model.
+
+@item gbr-offset=
+This parameter specifies the offset in bytes of the variable in the thread
+control block structure that should be used by the generated atomic sequences
+when the @samp{soft-tcb} model has been selected.  For other models this
+parameter is ignored.  The specified value must be an integer multiple of four
+and in the range 0-1020.
+
+@item strict
+This parameter prevents mixed usage of multiple atomic models, even though they
+would be compatible, and will make the compiler generate atomic sequences of the
+specified model only.
+
+@end table
 
 @item -mtas
 @opindex mtas