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lvzhengyang
riscv-gcc-1
Commits
7ada6625
Commit
7ada6625
authored
Feb 27, 2001
by
Jan Hubicka
Committed by
Jan Hubicka
Feb 27, 2001
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* i386.md (mins*, maxs*): New patterns, expanders and splitters.
From-SVN: r40092
parent
73ea87d7
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gcc/ChangeLog
View file @
7ada6625
Tue Feb 27 15:36:48 CET 2001 Jan Hubicka <jh@suse.cz>
* i386.md (mins*, maxs*): New patterns, expanders and splitters.
2001-02-26 Jeffrey Oldham <oldham@codesourcery.com>
2001-02-26 Jeffrey Oldham <oldham@codesourcery.com>
* mips.c (mips_make_temp_file): Fix thinko in last change.
* mips.c (mips_make_temp_file): Fix thinko in last change.
...
...
gcc/config/i386/i386.md
View file @
7ada6625
...
@@ -12110,6 +12110,296 @@
...
@@ -12110,6 +12110,296 @@
fcmov%f1
\\
t{%3, %0|%0, %3}"
fcmov%f1
\\
t{%3, %0|%0, %3}"
[
(set_attr "type" "fcmov")
[
(set_attr "type" "fcmov")
(set_attr "mode" "XF")])
(set_attr "mode" "XF")])
(define_expand "minsf3"
[
(parallel
[
(set (match_operand:SF 0 "register_operand" "")
(if_then_else:SF (lt (match_operand:SF 1 "register_operand" "")
(match_operand:SF 2 "nonimmediate_operand" ""))
(match_dup 1)
(match_dup 2)))
(clobber (reg:CC 17))])]
"TARGET_SSE"
"")
(define_insn "
*
minsf"
[
(set (match_operand:SF 0 "register_operand" "=x#f,f#x,f#x")
(if_then_else:SF (lt (match_operand:SF 1 "register_operand" "0,0,f#x")
(match_operand:SF 2 "nonimmediate_operand" "xm#f,f#x,0"))
(match_dup 1)
(match_dup 2)))
(clobber (reg:CC 17))]
"TARGET_SSE && TARGET_IEEE_FP"
"#")
(define_insn "
*
minsf_nonieee"
[
(set (match_operand:SF 0 "register_operand" "=x#f,f#x")
(if_then_else:SF (lt (match_operand:SF 1 "register_operand" "%0,0")
(match_operand:SF 2 "nonimmediate_operand" "xm#f,fm#x"))
(match_dup 1)
(match_dup 2)))
(clobber (reg:CC 17))]
"TARGET_SSE && !TARGET_IEEE_FP"
"#")
(define_split
[
(set (match_operand:SF 0 "register_operand" "")
(if_then_else:SF (lt (match_operand:SF 1 "register_operand" "")
(match_operand:SF 2 "nonimmediate_operand" ""))
(match_dup 1)
(match_dup 2)))
(clobber (reg:CC 17))]
"SSE_REG_P (operands
[
0
]
) && reload_completed"
[
(set (match_dup 0)
(if_then_else:SF (lt (match_dup 1)
(match_dup 2))
(match_dup 1)
(match_dup 2)))])
;; We can't represent the LT test directly. Do this by swapping the operands.
(define_split
[
(set (match_operand:SF 0 "register_operand" "")
(if_then_else:SF (lt (match_operand:SF 1 "register_operand" "")
(match_operand:SF 2 "register_operand" ""))
(match_dup 1)
(match_dup 2)))
(clobber (reg:CC 17))]
"FP_REG_P (operands
[
0
]
) && reload_completed"
[
(set (reg:CCFP 17)
(compare:CCFP (match_dup 2)
(match_dup 1)))
(set (match_dup 0)
(if_then_else:SF (ge (reg:CCFP 17) (const_int 0))
(match_dup 1)
(match_dup 2)))])
(define_insn "
*
minsf_sse"
[
(set (match_operand:SF 0 "register_operand" "=x")
(if_then_else:SF (lt (match_operand:SF 1 "register_operand" "0")
(match_operand:SF 2 "nonimmediate_operand" "xm"))
(match_dup 1)
(match_dup 2)))]
"TARGET_SSE && reload_completed"
"minss
\\
t{%2, %0|%0, %2}"
[
(set_attr "type" "sse")
(set_attr "mode" "SF")])
(define_expand "mindf3"
[
(parallel
[
(set (match_operand:DF 0 "register_operand" "")
(if_then_else:DF (lt (match_operand:DF 1 "register_operand" "")
(match_operand:DF 2 "nonimmediate_operand" ""))
(match_dup 1)
(match_dup 2)))
(clobber (reg:CC 17))])]
"TARGET_SSE2"
"#")
(define_insn "
*
mindf"
[
(set (match_operand:DF 0 "register_operand" "=Y#f,f#Y,f#Y")
(if_then_else:DF (lt (match_operand:DF 1 "register_operand" "0,0,f#Y")
(match_operand:DF 2 "nonimmediate_operand" "Ym#f,f#Y,0"))
(match_dup 1)
(match_dup 2)))
(clobber (reg:CC 17))]
"TARGET_SSE2 && TARGET_IEEE_FP"
"#")
(define_insn "
*
mindf_nonieee"
[
(set (match_operand:DF 0 "register_operand" "=Y#f,f#Y")
(if_then_else:DF (lt (match_operand:DF 1 "register_operand" "%0,0")
(match_operand:DF 2 "nonimmediate_operand" "Ym#f,fm#Y"))
(match_dup 1)
(match_dup 2)))
(clobber (reg:CC 17))]
"TARGET_SSE2 && !TARGET_IEEE_FP"
"#")
(define_split
[
(set (match_operand:DF 0 "register_operand" "")
(if_then_else:DF (lt (match_operand:DF 1 "register_operand" "")
(match_operand:DF 2 "nonimmediate_operand" ""))
(match_dup 1)
(match_dup 2)))
(clobber (reg:CC 17))]
"SSE_REG_P (operands
[
0
]
) && reload_completed"
[
(set (match_dup 0)
(if_then_else:DF (lt (match_dup 1)
(match_dup 2))
(match_dup 1)
(match_dup 2)))])
;; We can't represent the LT test directly. Do this by swapping the operands.
(define_split
[
(set (match_operand:DF 0 "register_operand" "")
(if_then_else:DF (lt (match_operand:DF 1 "register_operand" "")
(match_operand:DF 2 "register_operand" ""))
(match_dup 1)
(match_dup 2)))
(clobber (reg:CC 17))]
"FP_REG_P (operands
[
0
]
) && reload_completed"
[
(set (reg:CCFP 17)
(compare:CCFP (match_dup 2)
(match_dup 2)))
(set (match_dup 0)
(if_then_else:DF (ge (reg:CCFP 17) (const_int 0))
(match_dup 1)
(match_dup 2)))])
(define_insn "
*
mindf_sse"
[
(set (match_operand:DF 0 "register_operand" "=Y")
(if_then_else:DF (lt (match_operand:DF 1 "register_operand" "0")
(match_operand:DF 2 "nonimmediate_operand" "Ym"))
(match_dup 1)
(match_dup 2)))]
"TARGET_SSE2 && reload_completed"
"minsd
\\
t{%2, %0|%0, %2}"
[
(set_attr "type" "sse")
(set_attr "mode" "DF")])
(define_expand "maxsf3"
[
(parallel
[
(set (match_operand:SF 0 "register_operand" "")
(if_then_else:SF (gt (match_operand:SF 1 "register_operand" "")
(match_operand:SF 2 "nonimmediate_operand" ""))
(match_dup 1)
(match_dup 2)))
(clobber (reg:CC 17))])]
"TARGET_SSE"
"#")
(define_insn "
*
maxsf"
[
(set (match_operand:SF 0 "register_operand" "=x#f,f#x,f#x")
(if_then_else:SF (gt (match_operand:SF 1 "register_operand" "0,0,f#x")
(match_operand:SF 2 "nonimmediate_operand" "xm#f,fm#x,0"))
(match_dup 1)
(match_dup 2)))
(clobber (reg:CC 17))]
"TARGET_SSE && TARGET_IEEE_FP"
"#")
(define_insn "
*
maxsf_nonieee"
[
(set (match_operand:SF 0 "register_operand" "=x#f,f#x")
(if_then_else:SF (gt (match_operand:SF 1 "register_operand" "%0,0")
(match_operand:SF 2 "nonimmediate_operand" "xm#f,fm#x"))
(match_dup 1)
(match_dup 2)))
(clobber (reg:CC 17))]
"TARGET_SSE && !TARGET_IEEE_FP"
"#")
(define_split
[
(set (match_operand:SF 0 "register_operand" "")
(if_then_else:SF (gt (match_operand:SF 1 "register_operand" "")
(match_operand:SF 2 "nonimmediate_operand" ""))
(match_dup 1)
(match_dup 2)))
(clobber (reg:CC 17))]
"SSE_REG_P (operands
[
0
]
) && reload_completed"
[
(set (match_dup 0)
(if_then_else:SF (gt (match_dup 1)
(match_dup 2))
(match_dup 1)
(match_dup 2)))])
(define_split
[
(set (match_operand:SF 0 "register_operand" "")
(if_then_else:SF (gt (match_operand:SF 1 "register_operand" "")
(match_operand:SF 2 "register_operand" ""))
(match_dup 1)
(match_dup 2)))
(clobber (reg:CC 17))]
"FP_REG_P (operands
[
0
]
) && reload_completed"
[
(set (reg:CCFP 17)
(compare:CCFP (match_dup 1)
(match_dup 2)))
(set (match_dup 0)
(if_then_else:SF (gt (reg:CCFP 17) (const_int 0))
(match_dup 1)
(match_dup 2)))])
(define_insn "
*
maxsf_sse"
[
(set (match_operand:SF 0 "register_operand" "=x")
(if_then_else:SF (gt (match_operand:SF 1 "register_operand" "0")
(match_operand:SF 2 "nonimmediate_operand" "xm"))
(match_dup 1)
(match_dup 2)))]
"TARGET_SSE && reload_completed"
"maxss
\\
t{%2, %0|%0, %2}"
[
(set_attr "type" "sse")
(set_attr "mode" "SF")])
(define_expand "maxdf3"
[
(parallel
[
(set (match_operand:DF 0 "register_operand" "")
(if_then_else:DF (gt (match_operand:DF 1 "register_operand" "")
(match_operand:DF 2 "nonimmediate_operand" ""))
(match_dup 1)
(match_dup 2)))
(clobber (reg:CC 17))])]
"TARGET_SSE2"
"#")
(define_insn "
*
maxdf"
[
(set (match_operand:DF 0 "register_operand" "=Y#f,f#Y,f#Y")
(if_then_else:DF (gt (match_operand:DF 1 "register_operand" "0,0,f#Y")
(match_operand:DF 2 "nonimmediate_operand" "Ym#f,fm#Y,0"))
(match_dup 1)
(match_dup 2)))
(clobber (reg:CC 17))]
"TARGET_SSE2 && TARGET_IEEE_FP"
"#")
(define_insn "
*
maxdf_nonieee"
[
(set (match_operand:DF 0 "register_operand" "=Y#f,f#Y")
(if_then_else:DF (gt (match_operand:DF 1 "register_operand" "%0,0")
(match_operand:DF 2 "nonimmediate_operand" "Ym#f,fm#Y"))
(match_dup 1)
(match_dup 2)))
(clobber (reg:CC 17))]
"TARGET_SSE2 && !TARGET_IEEE_FP"
"#")
(define_split
[
(set (match_operand:DF 0 "register_operand" "")
(if_then_else:DF (gt (match_operand:DF 1 "register_operand" "")
(match_operand:DF 2 "nonimmediate_operand" ""))
(match_dup 1)
(match_dup 2)))
(clobber (reg:CC 17))]
"SSE_REG_P (operands
[
0
]
) && reload_completed"
[
(set (match_dup 0)
(if_then_else:DF (gt (match_dup 1)
(match_dup 2))
(match_dup 1)
(match_dup 2)))])
(define_split
[
(set (match_operand:DF 0 "register_operand" "")
(if_then_else:DF (gt (match_operand:DF 1 "register_operand" "")
(match_operand:DF 2 "register_operand" ""))
(match_dup 1)
(match_dup 2)))
(clobber (reg:CC 17))]
"FP_REG_P (operands
[
0
]
) && reload_completed"
[
(set (reg:CCFP 17)
(compare:CCFP (match_dup 1)
(match_dup 2)))
(set (match_dup 0)
(if_then_else:DF (gt (reg:CCFP 17) (const_int 0))
(match_dup 1)
(match_dup 2)))])
(define_insn "
*
maxdf_sse"
[
(set (match_operand:DF 0 "register_operand" "=Y")
(if_then_else:DF (gt (match_operand:DF 1 "register_operand" "0")
(match_operand:DF 2 "nonimmediate_operand" "Ym"))
(match_dup 1)
(match_dup 2)))]
"TARGET_SSE2 && reload_completed"
"maxsd
\\
t{%2, %0|%0, %2}"
[
(set_attr "type" "sse")
(set_attr "mode" "DF")])
;; Misc patterns (?)
;; Misc patterns (?)
...
...
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