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Commit 7a4eca66 by David Edelsohn Committed by David Edelsohn
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re PR target/18506 (Altivec definitions of vec_init) 

	PR target/18506
	* config/rs6000/altivec.md (vec_init<mode>): New.
	(vec_set<mode>): New.
	(vec_extract<mode>): New.
	* config/rs6000/rs6000.c (rs6000_expand_vector_init): New.
	(rs6000_expand_vector_set): New.
	(rs6000_expand_vector_extract): New.
	(rs6000_legitimate_offset_address_p): Offset addresses are valid
	for Altivec modes before reload.
	(altivec_expand_vec_init_builtin): New.
	(get_element_number): New.
	(altivec_expand_vec_set_builtin): New.
	(altivec_expand_vec_ext_builtin): New.
	(altivec_expand_builtin): Expand vec_init, vec_set, and vec_ext
	builtins.
	(altivec_init_builtins): Init vec_init, vec_set, and vec_ext
	builtins.
	* config/rs6000/rs6000.h (rs6000_builtins): Add
	ALTIVEC_BUILTIN_VEC_INIT_<mode>, ALTIVEC_BUILTIN_VEC_SET_<mode>,
	ALTIVEC_BUILTIN_VEC_EXT_<mode>.
	* config/rs6000/rs6000-protos.h: Declare new functions.

From-SVN: r102861
parent 47efdea4
Showing with 130 additions and 2 deletions
gcc/ChangeLog
2005-08-08 David Edelsohn <edelsohn@gnu.org>
PR target/18506
* config/rs6000/altivec.md (vec_init<mode>): New.
(vec_set<mode>): New.
(vec_extract<mode>): New.
* config/rs6000/rs6000.c (rs6000_expand_vector_init): New.
(rs6000_expand_vector_set): New.
(rs6000_expand_vector_extract): New.
(rs6000_legitimate_offset_address_p): Offset addresses are valid
for Altivec modes before reload.
(altivec_expand_vec_init_builtin): New.
(get_element_number): New.
(altivec_expand_vec_set_builtin): New.
(altivec_expand_vec_ext_builtin): New.
(altivec_expand_builtin): Expand vec_init, vec_set, and vec_ext
builtins.
(altivec_init_builtins): Init vec_init, vec_set, and vec_ext
builtins.
* config/rs6000/rs6000.h (rs6000_builtins): Add
ALTIVEC_BUILTIN_VEC_INIT_<mode>, ALTIVEC_BUILTIN_VEC_SET_<mode>,
ALTIVEC_BUILTIN_VEC_EXT_<mode>.
* config/rs6000/rs6000-protos.h: Declare new functions.
2005-08-08 Jan Hubicka <jh@suse.cz>
* i386.c (legitimate_pic_address_disp_p): Refuse GOTOFF in 64bit mode.
......
gcc/config/rs6000/altivec.md
......@@ -1840,7 +1840,7 @@
(define_insn "altivec_lve<VI_char>x"
[(parallel
[(set (match_operand:VI 0 "register_operand" "=v")
(match_operand:VI 1 "memory_operand" "m"))
(match_operand:VI 1 "memory_operand" "Z"))
(unspec [(const_int 0)] UNSPEC_LVE)])]
"TARGET_ALTIVEC"
"lve<VI_char>x %0,%y1"
......@@ -1849,7 +1849,7 @@
(define_insn "*altivec_lvesfx"
[(parallel
[(set (match_operand:V4SF 0 "register_operand" "=v")
(match_operand:V4SF 1 "memory_operand" "m"))
(match_operand:V4SF 1 "memory_operand" "Z"))
(unspec [(const_int 0)] UNSPEC_LVE)])]
"TARGET_ALTIVEC"
"lvewx %0,%y1"
......@@ -1907,6 +1907,95 @@
"stvewx %1,%y0"
[(set_attr "type" "vecstore")])
(define_expand "vec_init<mode>"
[(match_operand:V 0 "register_operand" "")
(match_operand 1 "" "")]
"TARGET_ALTIVEC"
{
rs6000_expand_vector_init (operands[0], operands[1]);
DONE;
})
(define_expand "vec_setv4si"
[(match_operand:V4SI 0 "register_operand" "")
(match_operand:SI 1 "register_operand" "")
(match_operand 2 "const_int_operand" "")]
"TARGET_ALTIVEC"
{
rs6000_expand_vector_set (operands[0], operands[1], INTVAL (operands[2]));
DONE;
})
(define_expand "vec_setv8hi"
[(match_operand:V8HI 0 "register_operand" "")
(match_operand:HI 1 "register_operand" "")
(match_operand 2 "const_int_operand" "")]
"TARGET_ALTIVEC"
{
rs6000_expand_vector_set (operands[0], operands[1], INTVAL (operands[2]));
DONE;
})
(define_expand "vec_setv16qi"
[(match_operand:V16QI 0 "register_operand" "")
(match_operand:QI 1 "register_operand" "")
(match_operand 2 "const_int_operand" "")]
"TARGET_ALTIVEC"
{
rs6000_expand_vector_set (operands[0], operands[1], INTVAL (operands[2]));
DONE;
})
(define_expand "vec_setv4sf"
[(match_operand:V4SF 0 "register_operand" "")
(match_operand:SF 1 "register_operand" "")
(match_operand 2 "const_int_operand" "")]
"TARGET_ALTIVEC"
{
rs6000_expand_vector_set (operands[0], operands[1], INTVAL (operands[2]));
DONE;
})
(define_expand "vec_extractv4si"
[(match_operand:SI 0 "register_operand" "")
(match_operand:V4SI 1 "register_operand" "")
(match_operand 2 "const_int_operand" "")]
"TARGET_ALTIVEC"
{
rs6000_expand_vector_extract (operands[0], operands[1], INTVAL (operands[2]));
DONE;
})
(define_expand "vec_extractv8hi"
[(match_operand:HI 0 "register_operand" "")
(match_operand:V8HI 1 "register_operand" "")
(match_operand 2 "const_int_operand" "")]
"TARGET_ALTIVEC"
{
rs6000_expand_vector_extract (operands[0], operands[1], INTVAL (operands[2]));
DONE;
})
(define_expand "vec_extractv16qi"
[(match_operand:QI 0 "register_operand" "")
(match_operand:V16QI 1 "register_operand" "")
(match_operand 2 "const_int_operand" "")]
"TARGET_ALTIVEC"
{
rs6000_expand_vector_extract (operands[0], operands[1], INTVAL (operands[2]));
DONE;
})
(define_expand "vec_extractv4sf"
[(match_operand:SF 0 "register_operand" "")
(match_operand:V4SF 1 "register_operand" "")
(match_operand 2 "const_int_operand" "")]
"TARGET_ALTIVEC"
{
rs6000_expand_vector_extract (operands[0], operands[1], INTVAL (operands[2]));
DONE;
})
;; Generate
;; vspltis? SCRATCH0,0
;; vsubu?m SCRATCH2,SCRATCH1,%1
......
gcc/config/rs6000/rs6000-protos.h
......@@ -50,6 +50,9 @@ extern rtx rs6000_got_register (rtx);
extern rtx find_addr_reg (rtx);
extern rtx gen_easy_vector_constant_add_self (rtx);
extern const char *output_vec_const_move (rtx *);
extern void rs6000_expand_vector_init (rtx, rtx);
extern void rs6000_expand_vector_set (rtx, rtx, int);
extern void rs6000_expand_vector_extract (rtx, rtx, int);
extern void build_mask64_2_operands (rtx, rtx *);
extern int expand_block_clear (rtx[]);
extern int expand_block_move (rtx[]);
......
gcc/config/rs6000/rs6000.h
......@@ -2490,6 +2490,18 @@ enum rs6000_builtins
ALTIVEC_BUILTIN_ABS_V16QI,
ALTIVEC_BUILTIN_MASK_FOR_LOAD,
ALTIVEC_BUILTIN_MASK_FOR_STORE,
ALTIVEC_BUILTIN_VEC_INIT_V4SI,
ALTIVEC_BUILTIN_VEC_INIT_V8HI,
ALTIVEC_BUILTIN_VEC_INIT_V16QI,
ALTIVEC_BUILTIN_VEC_INIT_V4SF,
ALTIVEC_BUILTIN_VEC_SET_V4SI,
ALTIVEC_BUILTIN_VEC_SET_V8HI,
ALTIVEC_BUILTIN_VEC_SET_V16QI,
ALTIVEC_BUILTIN_VEC_SET_V4SF,
ALTIVEC_BUILTIN_VEC_EXT_V4SI,
ALTIVEC_BUILTIN_VEC_EXT_V8HI,
ALTIVEC_BUILTIN_VEC_EXT_V16QI,
ALTIVEC_BUILTIN_VEC_EXT_V4SF,
/* Altivec overloaded builtins. */
ALTIVEC_BUILTIN_VCMPEQ_P,
......
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