simplify-rtx.c (simplify_unary_operation): Deal with logicals on floats.

	* simplify-rtx.c (simplify_unary_operation): Deal with logicals on
	floats.
	(simplify_binary_operation): Deal with logicals on floats.

	* i386.md (SSE fabs splitters): Emit new patterns.
	(SSE cmov splitters): Likewise.
	(sse_andv4sf3, sse_nandv4sf3, sse_iorv4sf3, sse_xorv4sf3
	(sse_andv2df3, sse_nandv2df3, sse_iorv2df3, sse_xorv2df3): Do not use
	subregs.
	(sse_andsf3, sse_nandsf3, sse_xorsf3): Kill.
	(sse_anddf3, sse_nanddf3, sse_xordf3): Kill.

From-SVN: r78045

gcc/ChangeLog

+2004-02-18  Jan Hubicka  <jh@suse.cz>
+
+	* simplify-rtx.c (simplify_unary_operation): Deal with logicals on
+	floats.
+	(simplify_binary_operation): Deal with logicals on floats.
+
+	* i386.md (SSE fabs splitters): Emit new patterns.
+	(SSE cmov splitters): Likewise.
+	(sse_andv4sf3, sse_nandv4sf3, sse_iorv4sf3, sse_xorv4sf3
+	(sse_andv2df3, sse_nandv2df3, sse_iorv2df3, sse_xorv2df3): Do not use
+	subregs.
+	(sse_andsf3, sse_nandsf3, sse_xorsf3): Kill.
+	(sse_anddf3, sse_nanddf3, sse_xordf3): Kill.
+
 2004-02-18  Kazu Hirata  <kazu@cs.umass.edu>
 
 	* config/h8300/h8300.c (expand_a_rotate): Don't generate insns

gcc/simplify-rtx.c

@@ -771,7 +771,16 @@ simplify_unary_operation (enum rtx_code code, enum machine_mode mode,
 	case FIX:
 	  real_arithmetic (&d, FIX_TRUNC_EXPR, &d, NULL);
 	  break;
+	case NOT:
+	  {
+	    long tmp[4];
+	    int i;
 
+	    real_to_target (tmp, &d, GET_MODE (trueop));
+	    for (i = 0; i < 4; i++)
+	      tmp[i] = ~tmp[i];
+	    real_from_target (&d, tmp, mode);
+	  }
 	default:
 	  abort ();
 	}
@@ -1210,6 +1219,35 @@ simplify_binary_operation (enum rtx_code code, enum machine_mode mode,
       && GET_CODE (trueop1) == CONST_DOUBLE
       && mode == GET_MODE (op0) && mode == GET_MODE (op1))
     {
+      if (code == AND
+	  || code == IOR
+	  || code == XOR)
+	{
+	  long tmp0[4];
+	  long tmp1[4];
+	  REAL_VALUE_TYPE r;
+	  int i;
+
+	  real_to_target (tmp0, CONST_DOUBLE_REAL_VALUE (op0),
+			  GET_MODE (op0));
+	  real_to_target (tmp1, CONST_DOUBLE_REAL_VALUE (op1),
+			  GET_MODE (op1));
+	  for (i = 0; i < 4; i++)
+	    {
+	      if (code == AND)
+		tmp0[i] &= tmp1[i];
+	      else if (code == IOR)
+		tmp0[i] |= tmp1[i];
+	      else if (code == XOR)
+		tmp0[i] ^= tmp1[i];
+	      else
+		abort ();
+	    }
+	   real_from_target (&r, tmp0, mode);
+	   return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
+	}
+      else
+	{
 	  REAL_VALUE_TYPE f0, f1, value;
 
 	  REAL_VALUE_FROM_CONST_DOUBLE (f0, trueop0);
@@ -1231,6 +1269,7 @@ simplify_binary_operation (enum rtx_code code, enum machine_mode mode,
 	  value = real_value_truncate (mode, value);
 	  return CONST_DOUBLE_FROM_REAL_VALUE (value, mode);
 	}
+    }
 
   /* We can fold some multi-word operations.  */
   if (GET_MODE_CLASS (mode) == MODE_INT