Commit 01ab5574 by Kazu Hirata Committed by Kazu Hirata

h8300.c (expand_a_rotate): Don't generate insns by hand.

	* config/h8300/h8300.c (expand_a_rotate): Don't generate insns
	by hand.
	(output_a_rotate): Tweak a comment.
	* config/h8300/h8300.md (*rotlqi3_1): Change to rotlqi3_1.
	(*rotlhi3_1): Change to rotlhi3_1.
	(*rotlsi3_1): Change to rotlsi3_1.

From-SVN: r78043
parent d5f7d2d0
2004-02-18 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300.c (expand_a_rotate): Don't generate insns
by hand.
(output_a_rotate): Tweak a comment.
* config/h8300/h8300.md (*rotlqi3_1): Change to rotlqi3_1.
(*rotlhi3_1): Change to rotlhi3_1.
(*rotlsi3_1): Change to rotlsi3_1.
2004-02-18 Richard Earnshaw <rearnsha@arm.com>
PR target/13866
......
......@@ -3861,7 +3861,6 @@ expand_a_rotate (enum rtx_code code, rtx operands[])
rtx src = operands[1];
rtx rotate_amount = operands[2];
enum machine_mode mode = GET_MODE (dst);
rtx tmp;
/* We rotate in place. */
emit_move_insn (dst, src);
......@@ -3883,12 +3882,23 @@ expand_a_rotate (enum rtx_code code, rtx operands[])
emit_label (start_label);
/* Rotate by one bit. */
tmp = gen_rtx_fmt_ee (code, mode, dst, const1_rtx);
emit_insn (gen_rtx_SET (mode, dst, tmp));
switch (mode)
{
case QImode:
emit_insn (gen_rotlqi3_1 (dst, dst, const1_rtx));
break;
case HImode:
emit_insn (gen_rotlhi3_1 (dst, dst, const1_rtx));
break;
case SImode:
emit_insn (gen_rotlsi3_1 (dst, dst, const1_rtx));
break;
default:
abort ();
}
/* Decrement the counter by 1. */
tmp = gen_rtx_PLUS (QImode, counter, constm1_rtx);
emit_insn (gen_rtx_SET (VOIDmode, counter, tmp));
emit_insn (gen_addqi3 (counter, counter, constm1_rtx));
/* If the loop counter is nonzero, we go back to the beginning
of the loop. */
......@@ -3900,8 +3910,20 @@ expand_a_rotate (enum rtx_code code, rtx operands[])
else
{
/* Rotate by AMOUNT bits. */
tmp = gen_rtx_fmt_ee (code, mode, dst, rotate_amount);
emit_insn (gen_rtx_SET (mode, dst, tmp));
switch (mode)
{
case QImode:
emit_insn (gen_rotlqi3_1 (dst, dst, rotate_amount));
break;
case HImode:
emit_insn (gen_rotlhi3_1 (dst, dst, rotate_amount));
break;
case SImode:
emit_insn (gen_rotlsi3_1 (dst, dst, rotate_amount));
break;
default:
abort ();
}
}
return 1;
......@@ -4001,7 +4023,7 @@ output_a_rotate (enum rtx_code code, rtx *operands)
(rotate_type == SHIFT_ASHIFT) ? SHIFT_LSHIFTRT : SHIFT_ASHIFT;
}
/* Emit rotate insns. */
/* Output rotate insns. */
for (bits = TARGET_H8300S ? 2 : 1; bits > 0; bits /= 2)
{
if (bits == 2)
......
......@@ -2602,7 +2602,7 @@
""
"if (expand_a_rotate (ROTATE, operands)) DONE; else FAIL;")
(define_insn "*rotlqi3_1"
(define_insn "rotlqi3_1"
[(set (match_operand:QI 0 "register_operand" "=r")
(rotate:QI (match_operand:QI 1 "register_operand" "0")
(match_operand:QI 2 "immediate_operand" "")))]
......@@ -2618,7 +2618,7 @@
""
"if (expand_a_rotate (ROTATE, operands)) DONE; else FAIL;")
(define_insn "*rotlhi3_1"
(define_insn "rotlhi3_1"
[(set (match_operand:HI 0 "register_operand" "=r")
(rotate:HI (match_operand:HI 1 "register_operand" "0")
(match_operand:QI 2 "immediate_operand" "")))]
......@@ -2634,7 +2634,7 @@
"TARGET_H8300H || TARGET_H8300S"
"if (expand_a_rotate (ROTATE, operands)) DONE; else FAIL;")
(define_insn "*rotlsi3_1"
(define_insn "rotlsi3_1"
[(set (match_operand:SI 0 "register_operand" "=r")
(rotate:SI (match_operand:SI 1 "register_operand" "0")
(match_operand:QI 2 "immediate_operand" "")))]
......
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