Commit 79517551 by Sofiane Naci Committed by Sofiane Naci

aarch64.c (aarch64_classify_address): Support PC-relative load in SI modes and above only.

	* config/aarch64/aarch64.c (aarch64_classify_address): Support
	PC-relative load in SI modes and above only.

From-SVN: r197107
parent a76213b9
2013-03-26 Sofiane Naci <sofiane.naci@arm.com>
* config/aarch64/aarch64.c (aarch64_classify_address): Support
PC-relative load in SI modes and above only.
2013-03-26 Xinyu Qi <xyqi@marvell.com> 2013-03-26 Xinyu Qi <xyqi@marvell.com>
* config/arm/arm.h (FIRST_IWMMXT_GR_REGNUM): Add comment. * config/arm/arm.h (FIRST_IWMMXT_GR_REGNUM): Add comment.
......
...@@ -2926,9 +2926,10 @@ aarch64_classify_address (struct aarch64_address_info *info, ...@@ -2926,9 +2926,10 @@ aarch64_classify_address (struct aarch64_address_info *info,
case CONST: case CONST:
case SYMBOL_REF: case SYMBOL_REF:
case LABEL_REF: case LABEL_REF:
/* load literal: pc-relative constant pool entry. */ /* load literal: pc-relative constant pool entry. Only supported
for SI mode or larger. */
info->type = ADDRESS_SYMBOLIC; info->type = ADDRESS_SYMBOLIC;
if (outer_code != PARALLEL) if (outer_code != PARALLEL && GET_MODE_SIZE (mode) >= 4)
{ {
rtx sym, addend; rtx sym, addend;
......
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