Commit 79166a87 by Jan-Benedict Glaw Committed by John David Anglin

vax.c (nonindexed_address_p): Change logical negation from '!

	* config/vax/vax.c (nonindexed_address_p): Change logical negation
	from '! xxx' to '!xxx' for coding-style conformance.
	* config/vax/vax.h (PCC_BITFIELD_TYPE_MATTERS): Likewise.
	(EXTRA_CONSTRAINT): Likewise.
	* config/vax/vax.md (four unnamed insns): Likewise.

From-SVN: r112113
parent 7e55aa4e
2006-03-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
* config/vax/vax.c (nonindexed_address_p): Change logical negation
from '! xxx' to '!xxx' for coding-style conformance.
* config/vax/vax.h (PCC_BITFIELD_TYPE_MATTERS): Likewise.
(EXTRA_CONSTRAINT): Likewise.
* config/vax/vax.md (four unnamed insns): Likewise.
2006-03-15 Paul Brook <paul@codesourcery.com> 2006-03-15 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (minipool_pad): New. * config/arm/arm.c (minipool_pad): New.
......
...@@ -1182,7 +1182,7 @@ nonindexed_address_p (rtx x, int strict) ...@@ -1182,7 +1182,7 @@ nonindexed_address_p (rtx x, int strict)
if (REG_P (x)) if (REG_P (x))
{ {
extern rtx *reg_equiv_mem; extern rtx *reg_equiv_mem;
if (! reload_in_progress if (!reload_in_progress
|| reg_equiv_mem[REGNO (x)] == 0 || reg_equiv_mem[REGNO (x)] == 0
|| indirectable_address_p (reg_equiv_mem[REGNO (x)], strict)) || indirectable_address_p (reg_equiv_mem[REGNO (x)], strict))
return 1; return 1;
......
...@@ -104,7 +104,7 @@ Boston, MA 02110-1301, USA. */ ...@@ -104,7 +104,7 @@ Boston, MA 02110-1301, USA. */
#define STRUCTURE_SIZE_BOUNDARY 8 #define STRUCTURE_SIZE_BOUNDARY 8
/* A bit-field declared as `int' forces `int' alignment for the struct. */ /* A bit-field declared as `int' forces `int' alignment for the struct. */
#define PCC_BITFIELD_TYPE_MATTERS (! TARGET_VAXC_ALIGNMENT) #define PCC_BITFIELD_TYPE_MATTERS (!TARGET_VAXC_ALIGNMENT)
/* No data type wants to be aligned rounder than this. */ /* No data type wants to be aligned rounder than this. */
#define BIGGEST_ALIGNMENT 32 #define BIGGEST_ALIGNMENT 32
...@@ -289,9 +289,9 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES }; ...@@ -289,9 +289,9 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
For the VAX, `Q' means that OP is a MEM that does not have a mode-dependent For the VAX, `Q' means that OP is a MEM that does not have a mode-dependent
address. */ address. */
#define EXTRA_CONSTRAINT(OP, C) \ #define EXTRA_CONSTRAINT(OP, C) \
((C) == 'Q' \ ((C) == 'Q' \
? MEM_P (OP) && ! mode_dependent_address_p (XEXP (OP, 0)) \ ? MEM_P (OP) && !mode_dependent_address_p (XEXP (OP, 0)) \
: 0) : 0)
/* Given an rtx X being reloaded into a reg required to be /* Given an rtx X being reloaded into a reg required to be
......
...@@ -762,7 +762,7 @@ ...@@ -762,7 +762,7 @@
"(INTVAL (operands[1]) == 8 || INTVAL (operands[1]) == 16) "(INTVAL (operands[1]) == 8 || INTVAL (operands[1]) == 16)
&& INTVAL (operands[2]) % INTVAL (operands[1]) == 0 && INTVAL (operands[2]) % INTVAL (operands[1]) == 0
&& (REG_P (operands[0]) && (REG_P (operands[0])
|| ! mode_dependent_address_p (XEXP (operands[0], 0)))" || !mode_dependent_address_p (XEXP (operands[0], 0)))"
"* "*
{ {
if (REG_P (operands[0])) if (REG_P (operands[0]))
...@@ -790,7 +790,7 @@ ...@@ -790,7 +790,7 @@
"(INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16) "(INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16)
&& INTVAL (operands[3]) % INTVAL (operands[2]) == 0 && INTVAL (operands[3]) % INTVAL (operands[2]) == 0
&& (REG_P (operands[1]) && (REG_P (operands[1])
|| ! mode_dependent_address_p (XEXP (operands[1], 0)))" || !mode_dependent_address_p (XEXP (operands[1], 0)))"
"* "*
{ {
if (REG_P (operands[1])) if (REG_P (operands[1]))
...@@ -817,7 +817,7 @@ ...@@ -817,7 +817,7 @@
"(INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16) "(INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16)
&& INTVAL (operands[3]) % INTVAL (operands[2]) == 0 && INTVAL (operands[3]) % INTVAL (operands[2]) == 0
&& (REG_P (operands[1]) && (REG_P (operands[1])
|| ! mode_dependent_address_p (XEXP (operands[1], 0)))" || !mode_dependent_address_p (XEXP (operands[1], 0)))"
"* "*
{ {
if (REG_P (operands[1])) if (REG_P (operands[1]))
...@@ -963,7 +963,7 @@ ...@@ -963,7 +963,7 @@
"" ""
"* "*
{ {
if (! REG_P (operands[0]) || GET_CODE (operands[2]) != CONST_INT if (!REG_P (operands[0]) || GET_CODE (operands[2]) != CONST_INT
|| GET_CODE (operands[3]) != CONST_INT || GET_CODE (operands[3]) != CONST_INT
|| INTVAL (operands[2]) + INTVAL (operands[3]) > 32 || INTVAL (operands[2]) + INTVAL (operands[3]) > 32
|| side_effects_p (operands[1]) || side_effects_p (operands[1])
......
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