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riscv-gcc-1
Commit 78e8956b by H.J. Lu
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i386.md (smaxmin): New. 

2008-04-01  H.J. Lu  <hongjiu.lu@intel.com>

	* config/i386/i386.md (smaxmin): New.
	(umaxmin): Likewise.
	(maxminiprefix): Likewise.
	(maxminfprefix): Likewise.
	(<code><mode>3): Likewise.
	(smin<mode>3): Removed.
	(smax<mode>3): Likewise.

	* config/i386/mmx.md (mmx_<code>v2sf3): New.
	(mmx_<code>v4hi3): Likewise.
	(mmx_<code>v8qi3): Likewise.
	(mmx_smaxv2sf3): Removed.
	(mmx_sminv2sf3): Likewise.
	(mmx_umaxv8qi3): Likewise.
	(mmx_smaxv4hi3): Likewise.
	(mmx_uminv8qi3): Likewise.
	(mmx_sminv4hi3): Likewise.

	* config/i386/sse.md (<addsub><mode>3): New.
	(*<addsub><mode>3): Likewise.
	(<sse>_vm<addsub><mode>3): Likewise.
	(<maxmin><mode>3): Likewise.
	(*<maxmin><mode>3_finite): Likewise.
	(*<maxmin><mode>3): Likewise.
	(<sse>_vm<maxmin><mode>3): Likewise.
	(sse3_h<addsub>v4sf3): Likewise.
	(sse3_h<addsub>v2df3): Likewise.
	(<maxmin>v16qi3): Likewise.
	(*<maxmin>v16qi3): Likewise.
	(<maxmin>v8hi3): Likewise.
	(*<maxmin>v8hi3): Likewise.
	(*sse4_1_<maxmin><mode>3): Likewise.
	(*sse4_1_<maxmin><mode>3): Likewise.
	(add<mode>3): Removed.
	(*add<mode>3): Likewise.
	(<sse>_vmadd<mode>3): Likewise.
	(sub<mode>3): Likewise.
	(*sub<mode>3): Likewise.
	(<sse>_vmsub<mode>3): Likewise.
	(smin<mode>3): Likewise.
	(*smin<mode>3_finite): Likewise.
	(*smin<mode>3): Likewise.
	(<sse>_vmsmin<mode>3): Likewise.
	(smax<mode>3): Likewise.
	(*smax<mode>3_finite): Likewise.
	(*smax<mode>3): Likewise.
	(<sse>_vmsmax<mode>3): Likewise.
	(sse3_haddv4sf3): Likewise.
	(sse3_haddv2df3): Likewise.
	(sse3_hsubv4sf3): Likewise.
	(sse3_hsubv2df3): Likewise.
	(umaxv16qi3): Likewise.
	(*umaxv16qi3): Likewise.
	(smaxv8hi3): Likewise.
	(*smaxv8hi3): Likewise.
	(*sse4_1_smax<mode>3): Likewise.
	(*sse4_1_umax<mode>3): Likewise.
	(uminv16qi3): Likewise.
	(*uminv16qi3): Likewise.
	(sminv8hi3): Likewise.
	(*sminv8hi3): Likewise.
	(*sse4_1_smin<mode>3): Likewise.
	(*sse4_1_umin<mode>3): Likewise.

From-SVN: r133797
parent 220f1c29
Showing with 95 additions and 55 deletions
gcc/ChangeLog
2008-04-01 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/i386.md (smaxmin): New.
(umaxmin): Likewise.
(maxminiprefix): Likewise.
(maxminfprefix): Likewise.
(<code><mode>3): Likewise.
(smin<mode>3): Removed.
(smax<mode>3): Likewise.
* config/i386/mmx.md (mmx_<code>v2sf3): New.
(mmx_<code>v4hi3): Likewise.
(mmx_<code>v8qi3): Likewise.
(mmx_smaxv2sf3): Removed.
(mmx_sminv2sf3): Likewise.
(mmx_umaxv8qi3): Likewise.
(mmx_smaxv4hi3): Likewise.
(mmx_uminv8qi3): Likewise.
(mmx_sminv4hi3): Likewise.
* config/i386/sse.md (<addsub><mode>3): New.
(*<addsub><mode>3): Likewise.
(<sse>_vm<addsub><mode>3): Likewise.
(<maxmin><mode>3): Likewise.
(*<maxmin><mode>3_finite): Likewise.
(*<maxmin><mode>3): Likewise.
(<sse>_vm<maxmin><mode>3): Likewise.
(sse3_h<addsub>v4sf3): Likewise.
(sse3_h<addsub>v2df3): Likewise.
(<maxmin>v16qi3): Likewise.
(*<maxmin>v16qi3): Likewise.
(<maxmin>v8hi3): Likewise.
(*<maxmin>v8hi3): Likewise.
(*sse4_1_<maxmin><mode>3): Likewise.
(*sse4_1_<maxmin><mode>3): Likewise.
(add<mode>3): Removed.
(*add<mode>3): Likewise.
(<sse>_vmadd<mode>3): Likewise.
(sub<mode>3): Likewise.
(*sub<mode>3): Likewise.
(<sse>_vmsub<mode>3): Likewise.
(smin<mode>3): Likewise.
(*smin<mode>3_finite): Likewise.
(*smin<mode>3): Likewise.
(<sse>_vmsmin<mode>3): Likewise.
(smax<mode>3): Likewise.
(*smax<mode>3_finite): Likewise.
(*smax<mode>3): Likewise.
(<sse>_vmsmax<mode>3): Likewise.
(sse3_haddv4sf3): Likewise.
(sse3_haddv2df3): Likewise.
(sse3_hsubv4sf3): Likewise.
(sse3_hsubv2df3): Likewise.
(umaxv16qi3): Likewise.
(*umaxv16qi3): Likewise.
(smaxv8hi3): Likewise.
(*smaxv8hi3): Likewise.
(*sse4_1_smax<mode>3): Likewise.
(*sse4_1_umax<mode>3): Likewise.
(uminv16qi3): Likewise.
(*uminv16qi3): Likewise.
(sminv8hi3): Likewise.
(*sminv8hi3): Likewise.
(*sse4_1_smin<mode>3): Likewise.
(*sse4_1_umin<mode>3): Likewise.
2008-04-01 Rafael Espindola <espindola@google.com>
* tree-cfg.c (verify_expr): remove in_phi.
(verify_stmt): Don't call walk_tree with verify_expr. Use
(verify_stmt): Don't call walk_tree with verify_expr. Use
is_gimple_min_invariant instead of is_gimple_val.
2008-04-01 Joseph Myers <joseph@codesourcery.com>
......
gcc/config/i386/i386.md
......@@ -530,6 +530,16 @@
;; Mark commutative operators as such in constraints.
(define_code_attr comm [(plus "%") (minus "")])
;; Mapping of signed max and min
(define_code_iterator smaxmin [smax smin])
;; Mapping of unsigned max and min
(define_code_iterator umaxmin [umax umin])
;; Base name for integer and FP insn mnemonic
(define_code_attr maxminiprefix [(smax "maxs") (smin "mins") (umax "maxu") (umin "minu")])
(define_code_attr maxminfprefix [(smax "max") (smin "min")])
;; All single word integer modes.
(define_mode_iterator SWI [QI HI SI (DI "TARGET_64BIT")])
......@@ -19505,23 +19515,13 @@
;; Since both the tree-level MAX_EXPR and the rtl-level SMAX operator
;; are undefined in this condition, we're certain this is correct.
(define_insn "smin<mode>3"
[(set (match_operand:MODEF 0 "register_operand" "=x")
(smin:MODEF
(match_operand:MODEF 1 "nonimmediate_operand" "%0")
(match_operand:MODEF 2 "nonimmediate_operand" "xm")))]
"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"
"mins<ssemodefsuffix>\t{%2, %0|%0, %2}"
[(set_attr "type" "sseadd")
(set_attr "mode" "<MODE>")])
(define_insn "smax<mode>3"
(define_insn "<code><mode>3"
[(set (match_operand:MODEF 0 "register_operand" "=x")
(smax:MODEF
(smaxmin:MODEF
(match_operand:MODEF 1 "nonimmediate_operand" "%0")
(match_operand:MODEF 2 "nonimmediate_operand" "xm")))]
"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"
"maxs<ssemodefsuffix>\t{%2, %0|%0, %2}"
"<maxminfprefix>s<ssemodefsuffix>\t{%2, %0|%0, %2}"
[(set_attr "type" "sseadd")
(set_attr "mode" "<MODE>")])
......
gcc/config/i386/mmx.md
......@@ -248,21 +248,13 @@
[(set_attr "type" "mmxmul")
(set_attr "mode" "V2SF")])
(define_insn "mmx_smaxv2sf3"
(define_insn "mmx_<code>v2sf3"
[(set (match_operand:V2SF 0 "register_operand" "=y")
(smax:V2SF (match_operand:V2SF 1 "nonimmediate_operand" "%0")
(match_operand:V2SF 2 "nonimmediate_operand" "ym")))]
(smaxmin:V2SF
(match_operand:V2SF 1 "nonimmediate_operand" "%0")
(match_operand:V2SF 2 "nonimmediate_operand" "ym")))]
"TARGET_3DNOW && ix86_binary_operator_ok (SMAX, V2SFmode, operands)"
"pfmax\\t{%2, %0|%0, %2}"
[(set_attr "type" "mmxadd")
(set_attr "mode" "V2SF")])
(define_insn "mmx_sminv2sf3"
[(set (match_operand:V2SF 0 "register_operand" "=y")
(smin:V2SF (match_operand:V2SF 1 "nonimmediate_operand" "%0")
(match_operand:V2SF 2 "nonimmediate_operand" "ym")))]
"TARGET_3DNOW && ix86_binary_operator_ok (SMIN, V2SFmode, operands)"
"pfmin\\t{%2, %0|%0, %2}"
"pf<maxminfprefix>\\t{%2, %0|%0, %2}"
[(set_attr "type" "mmxadd")
(set_attr "mode" "V2SF")])
......@@ -715,43 +707,25 @@
[(set_attr "type" "mmxmul")
(set_attr "mode" "DI")])
(define_insn "mmx_umaxv8qi3"
[(set (match_operand:V8QI 0 "register_operand" "=y")
(umax:V8QI (match_operand:V8QI 1 "nonimmediate_operand" "%0")
(match_operand:V8QI 2 "nonimmediate_operand" "ym")))]
"(TARGET_SSE || TARGET_3DNOW_A)
&& ix86_binary_operator_ok (UMAX, V8QImode, operands)"
"pmaxub\t{%2, %0|%0, %2}"
[(set_attr "type" "mmxadd")
(set_attr "mode" "DI")])
(define_insn "mmx_smaxv4hi3"
(define_insn "mmx_<code>v4hi3"
[(set (match_operand:V4HI 0 "register_operand" "=y")
(smax:V4HI (match_operand:V4HI 1 "nonimmediate_operand" "%0")
(match_operand:V4HI 2 "nonimmediate_operand" "ym")))]
(smaxmin:V4HI
(match_operand:V4HI 1 "nonimmediate_operand" "%0")
(match_operand:V4HI 2 "nonimmediate_operand" "ym")))]
"(TARGET_SSE || TARGET_3DNOW_A)
&& ix86_binary_operator_ok (SMAX, V4HImode, operands)"
"pmaxsw\t{%2, %0|%0, %2}"
"p<maxminiprefix>w\t{%2, %0|%0, %2}"
[(set_attr "type" "mmxadd")
(set_attr "mode" "DI")])
(define_insn "mmx_uminv8qi3"
(define_insn "mmx_<code>v8qi3"
[(set (match_operand:V8QI 0 "register_operand" "=y")
(umin:V8QI (match_operand:V8QI 1 "nonimmediate_operand" "%0")
(match_operand:V8QI 2 "nonimmediate_operand" "ym")))]
(umaxmin:V8QI
(match_operand:V8QI 1 "nonimmediate_operand" "%0")
(match_operand:V8QI 2 "nonimmediate_operand" "ym")))]
"(TARGET_SSE || TARGET_3DNOW_A)
&& ix86_binary_operator_ok (UMIN, V8QImode, operands)"
"pminub\t{%2, %0|%0, %2}"
[(set_attr "type" "mmxadd")
(set_attr "mode" "DI")])
(define_insn "mmx_sminv4hi3"
[(set (match_operand:V4HI 0 "register_operand" "=y")
(smin:V4HI (match_operand:V4HI 1 "nonimmediate_operand" "%0")
(match_operand:V4HI 2 "nonimmediate_operand" "ym")))]
"(TARGET_SSE || TARGET_3DNOW_A)
&& ix86_binary_operator_ok (SMIN, V4HImode, operands)"
"pminsw\t{%2, %0|%0, %2}"
"p<maxminiprefix>b\t{%2, %0|%0, %2}"
[(set_attr "type" "mmxadd")
(set_attr "mode" "DI")])
......
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