Commit 78dc36f8 by Kyrylo Tkachov Committed by Kyrylo Tkachov

[ARM] Fix arm bootstrap failure due to -Werror=shift-negative-value

	* config/arm/arm.c (arm_gen_constant): Use HOST_WIDE_INT_M1U instead
	of -1 when shifting.  Change type of val to unsigned HOST_WIDE_INT.
	Update prototype.

From-SVN: r227798
parent 4f912f91
2015-09-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.c (arm_gen_constant): Use HOST_WIDE_INT_M1U instead
of -1 when shifting. Change type of val to unsigned HOST_WIDE_INT.
Update prototype.
2015-09-15 Richard Biener <rguenther@suse.de> 2015-09-15 Richard Biener <rguenther@suse.de>
PR tree-optimization/67470 PR tree-optimization/67470
......
...@@ -95,7 +95,7 @@ static int arm_compute_static_chain_stack_bytes (void); ...@@ -95,7 +95,7 @@ static int arm_compute_static_chain_stack_bytes (void);
static arm_stack_offsets *arm_get_frame_offsets (void); static arm_stack_offsets *arm_get_frame_offsets (void);
static void arm_add_gc_roots (void); static void arm_add_gc_roots (void);
static int arm_gen_constant (enum rtx_code, machine_mode, rtx, static int arm_gen_constant (enum rtx_code, machine_mode, rtx,
HOST_WIDE_INT, rtx, rtx, int, int); unsigned HOST_WIDE_INT, rtx, rtx, int, int);
static unsigned bit_count (unsigned long); static unsigned bit_count (unsigned long);
static unsigned feature_count (const arm_feature_set*); static unsigned feature_count (const arm_feature_set*);
static int arm_address_register_rtx_p (rtx, int); static int arm_address_register_rtx_p (rtx, int);
...@@ -4229,8 +4229,8 @@ emit_constant_insn (rtx cond, rtx pattern) ...@@ -4229,8 +4229,8 @@ emit_constant_insn (rtx cond, rtx pattern)
static int static int
arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond,
HOST_WIDE_INT val, rtx target, rtx source, int subtargets, unsigned HOST_WIDE_INT val, rtx target, rtx source,
int generate) int subtargets, int generate)
{ {
int can_invert = 0; int can_invert = 0;
int can_negate = 0; int can_negate = 0;
...@@ -4600,7 +4600,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, ...@@ -4600,7 +4600,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond,
mvn r0, r0, asl #12 mvn r0, r0, asl #12
mvn r0, r0, lsr #12 */ mvn r0, r0, lsr #12 */
if (set_sign_bit_copies > 8 if (set_sign_bit_copies > 8
&& (val & (-1 << (32 - set_sign_bit_copies))) == val) && (val & (HOST_WIDE_INT_M1U << (32 - set_sign_bit_copies))) == val)
{ {
if (generate) if (generate)
{ {
......
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