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lvzhengyang
riscv-gcc-1
Commits
78d8b9f0
Commit
78d8b9f0
authored
11 years ago
by
Ian Bolton
Committed by
Ian Bolton
11 years ago
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Improve handling of constants destined for FP_REGS on AArch64
From-SVN: r202403
parent
aeda100f
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4 changed files
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46 additions
and
3 deletions
+46
-3
gcc/ChangeLog
+5
-0
gcc/config/aarch64/aarch64.c
+11
-3
gcc/testsuite/ChangeLog
+4
-0
gcc/testsuite/gcc.target/aarch64/movdi_1.c
+26
-0
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gcc/ChangeLog
View file @
78d8b9f0
2013-09-09 Ian Bolton <ian.bolton@arm.com>
* config/aarch64/aarch64.c (aarch64_preferred_reload_class): Return
NO_REGS for immediate that can't be moved directly into FP_REGS.
2013-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c (aarch64_select_cc_mode): Return CC_SWP for
...
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gcc/config/aarch64/aarch64.c
View file @
78d8b9f0
...
...
@@ -4237,10 +4237,18 @@ aarch64_class_max_nregs (reg_class_t regclass, enum machine_mode mode)
}
static
reg_class_t
aarch64_preferred_reload_class
(
rtx
x
ATTRIBUTE_UNUSED
,
reg_class_t
regclass
)
aarch64_preferred_reload_class
(
rtx
x
,
reg_class_t
regclass
)
{
return
((
regclass
==
POINTER_REGS
||
regclass
==
STACK_REG
)
?
GENERAL_REGS
:
regclass
);
if
(
regclass
==
POINTER_REGS
||
regclass
==
STACK_REG
)
return
GENERAL_REGS
;
/* If it's an integer immediate that MOVI can't handle, then
FP_REGS is not an option, so we return NO_REGS instead. */
if
(
CONST_INT_P
(
x
)
&&
reg_class_subset_p
(
regclass
,
FP_REGS
)
&&
!
aarch64_simd_imm_scalar_p
(
x
,
GET_MODE
(
x
)))
return
NO_REGS
;
return
regclass
;
}
void
...
...
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gcc/testsuite/ChangeLog
View file @
78d8b9f0
2013-09-09 Ian Bolton <ian.bolton@arm.com>
* gcc.target/aarch64/movdi_1.c: New test.
2013-09-09 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/58362
...
...
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gcc/testsuite/gcc.target/aarch64/movdi_1.c
0 → 100644
View file @
78d8b9f0
/* { dg-do compile } */
/* { dg-options "-O2 -fno-inline" } */
#include <arm_neon.h>
void
foo1
(
uint64_t
*
a
)
{
uint64x1_t
val18
;
uint32x2_t
val19
;
uint64x1_t
val20
;
val19
=
vcreate_u32
(
0x800000004cf3dffbUL
);
val20
=
vrsra_n_u64
(
val18
,
vreinterpret_u64_u32
(
val19
),
34
);
vst1_u64
(
a
,
val20
);
}
void
foo2
(
uint64_t
*
a
)
{
uint64x1_t
val18
;
uint32x2_t
val19
;
uint64x1_t
val20
;
val19
=
vcreate_u32
(
0xdffbUL
);
val20
=
vrsra_n_u64
(
val18
,
vreinterpret_u64_u32
(
val19
),
34
);
vst1_u64
(
a
,
val20
);
}
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