Commit 786de7eb by Kazu Hirata Committed by Kazu Hirata

sbitmap.c: Fix formatting.

	* sbitmap.c: Fix formatting.
	* scan.c: Likewise.
	* scan-decls.c: Likewise.
	* sched-deps.c: Likewise.
	* sched-ebb.c: Likewise.
	* sched-rgn.c: Likewise.
	* sched-vis.c: Likewise.
	* sdbout.c: Likewise.
	* sibcall.c: Likewise.
	* simplify-rtx.c: Likewise.
	* ssa.c: Likewise.
	* ssa-ccp.c: Likewise.
	* ssa-dce.c: Likewise.
	* stmt.c: Likewise.
	* stor-layout.c: Likewise.
	* stringpool.c: Likewise.

From-SVN: r53324
parent b7764693
2002-05-09 Kazu Hirata <kazu@cs.umass.edu>
* sbitmap.c: Fix formatting.
* scan.c: Likewise.
* scan-decls.c: Likewise.
* sched-deps.c: Likewise.
* sched-ebb.c: Likewise.
* sched-rgn.c: Likewise.
* sched-vis.c: Likewise.
* sdbout.c: Likewise.
* sibcall.c: Likewise.
* simplify-rtx.c: Likewise.
* ssa.c: Likewise.
* ssa-ccp.c: Likewise.
* ssa-dce.c: Likewise.
* stmt.c: Likewise.
* stor-layout.c: Likewise.
* stringpool.c: Likewise.
2002-05-09 David S. Miller <davem@redhat.com>
* config/sparc/sol2.h (ASM_CPU_SPEC): Handle -mcpu=v9.
......
/* Simple bitmaps.
Copyright (C) 1999, 2000 Free Software Foundation, Inc.
Copyright (C) 1999, 2000, 2002 Free Software Foundation, Inc.
This file is part of GCC.
......@@ -222,7 +222,7 @@ sbitmap_difference (dst, a, b)
sbitmap_ptr dstp = dst->elms;
sbitmap_ptr ap = a->elms;
sbitmap_ptr bp = b->elms;
for (i = 0; i < n; i++)
*dstp++ = *ap++ & ~*bp++;
}
......@@ -444,7 +444,7 @@ sbitmap_intersection_of_succs (dst, src, bb)
for (e = b->succ; e != 0; e = e->succ_next)
{
if (e->dest == EXIT_BLOCK_PTR)
continue;
continue;
sbitmap_copy (dst, src[e->dest->index]);
break;
......@@ -484,7 +484,7 @@ sbitmap_intersection_of_preds (dst, src, bb)
for (e = b->pred; e != 0; e = e->pred_next)
{
if (e->src == ENTRY_BLOCK_PTR)
continue;
continue;
sbitmap_copy (dst, src[e->src->index]);
break;
......@@ -524,7 +524,7 @@ sbitmap_union_of_succs (dst, src, bb)
for (e = b->succ; e != 0; e = e->succ_next)
{
if (e->dest == EXIT_BLOCK_PTR)
continue;
continue;
sbitmap_copy (dst, src[e->dest->index]);
break;
......@@ -564,7 +564,7 @@ sbitmap_union_of_preds (dst, src, bb)
for (e = b->pred; e != 0; e = e->pred_next)
{
if (e->src== ENTRY_BLOCK_PTR)
continue;
continue;
sbitmap_copy (dst, src[e->src->index]);
break;
......@@ -580,7 +580,7 @@ sbitmap_union_of_preds (dst, src, bb)
if (e->src == ENTRY_BLOCK_PTR)
continue;
p = src[e->src->index]->elms;
r = dst->elms;
for (i = 0; i < set_size; i++)
......
......@@ -72,7 +72,7 @@ skip_to_closing_brace (pfile)
/* This function scans a C source file (actually, the output of cpp),
reading from FP. It looks for function declarations, and
external variable declarations.
external variable declarations.
The following grammar (as well as some extra stuff) is recognized:
......@@ -155,7 +155,7 @@ scan_decls (pfile, argc, argv)
/* ... fall through ... */
case CPP_OPEN_BRACE: case CPP_CLOSE_BRACE:
goto new_statement;
case CPP_EOF:
return 0;
......
......@@ -34,7 +34,7 @@ make_sstring_space (str, count)
if (new_size <= cur_size)
return;
str->base = xrealloc (str->base, new_size);
str->ptr = str->base + cur_size;
str->limit = str->base + new_size;
......@@ -53,7 +53,7 @@ sstring_append (dst, src)
s = src->base;
while (--count >= 0) *d++ = *s++;
dst->ptr = d;
*d = 0;
*d = 0;
}
int
......
......@@ -280,7 +280,7 @@ add_dependence (insn, elem, dep_type)
else if (TEST_BIT (output_dependency_cache[INSN_LUID (insn)],
INSN_LUID (elem)))
present_dep_type = REG_DEP_OUTPUT;
else
else
present_p = 0;
if (present_p && (int) dep_type >= (int) present_dep_type)
return;
......@@ -313,7 +313,7 @@ add_dependence (insn, elem, dep_type)
one, then change the existing dependence to this type. */
if ((int) dep_type < (int) REG_NOTE_KIND (link))
PUT_REG_NOTE_KIND (link, dep_type);
#ifdef INSN_SCHEDULING
/* If we are adding a dependency to INSN's LOG_LINKs, then
note that in the bitmap caches of dependency information. */
......@@ -1032,7 +1032,7 @@ sched_analyze_insn (deps, x, insn, loop_notes)
}
/* If this instruction can throw an exception, then moving it changes
where block boundaries fall. This is mighty confusing elsewhere.
where block boundaries fall. This is mighty confusing elsewhere.
Therefore, prevent such an instruction from being moved. */
if (can_throw_internal (insn))
reg_pending_barrier = true;
......
/* Instruction scheduling pass.
Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
1999, 2000, 2001 Free Software Foundation, Inc.
1999, 2000, 2001, 2002 Free Software Foundation, Inc.
Contributed by Michael Tiemann (tiemann@cygnus.com) Enhanced by,
and currently maintained by, Jim Wilson (wilson@cygnus.com)
......@@ -297,7 +297,7 @@ schedule_ebbs (dump_file)
/* Schedule every region in the subroutine. */
for (i = 0; i < n_basic_blocks; i++)
{
{
rtx head = BASIC_BLOCK (i)->head;
rtx tail;
......
......@@ -577,17 +577,17 @@ too_large (block, num_bbs, num_insns)
/* Update_loop_relations(blk, hdr): Check if the loop headed by max_hdr[blk]
is still an inner loop. Put in max_hdr[blk] the header of the most inner
loop containing blk. */
#define UPDATE_LOOP_RELATIONS(blk, hdr) \
{ \
if (max_hdr[blk] == -1) \
max_hdr[blk] = hdr; \
else if (dfs_nr[max_hdr[blk]] > dfs_nr[hdr]) \
RESET_BIT (inner, hdr); \
else if (dfs_nr[max_hdr[blk]] < dfs_nr[hdr]) \
{ \
RESET_BIT (inner,max_hdr[blk]); \
max_hdr[blk] = hdr; \
} \
#define UPDATE_LOOP_RELATIONS(blk, hdr) \
{ \
if (max_hdr[blk] == -1) \
max_hdr[blk] = hdr; \
else if (dfs_nr[max_hdr[blk]] > dfs_nr[hdr]) \
RESET_BIT (inner, hdr); \
else if (dfs_nr[max_hdr[blk]] < dfs_nr[hdr]) \
{ \
RESET_BIT (inner,max_hdr[blk]); \
max_hdr[blk] = hdr; \
} \
}
/* Find regions for interblock scheduling.
......@@ -1094,7 +1094,7 @@ compute_dom_prob_ps (bb)
if (CONTAINING_RGN (TO_BLOCK (nxt_out_edge)) !=
CONTAINING_RGN (BB_TO_BLOCK (bb)))
++nr_rgn_out_edges;
SET_BIT (pot_split[bb], EDGE_TO_BIT (nxt_out_edge));
SET_BIT (pot_split[bb], EDGE_TO_BIT (nxt_out_edge));
nxt_out_edge = NEXT_OUT (nxt_out_edge);
}
......@@ -1562,17 +1562,17 @@ enum INSN_TRAP_CLASS
/* Non-zero if block bb_to is equal to, or reachable from block bb_from. */
#define IS_REACHABLE(bb_from, bb_to) \
(bb_from == bb_to \
(bb_from == bb_to \
|| IS_RGN_ENTRY (bb_from) \
|| (TEST_BIT (ancestor_edges[bb_to], \
EDGE_TO_BIT (IN_EDGES (BB_TO_BLOCK (bb_from))))))
|| (TEST_BIT (ancestor_edges[bb_to], \
EDGE_TO_BIT (IN_EDGES (BB_TO_BLOCK (bb_from))))))
/* Non-zero iff the address is comprised from at most 1 register. */
#define CONST_BASED_ADDRESS_P(x) \
(GET_CODE (x) == REG \
|| ((GET_CODE (x) == PLUS || GET_CODE (x) == MINUS \
|| (GET_CODE (x) == LO_SUM)) \
&& (CONSTANT_P (XEXP (x, 0)) \
|| ((GET_CODE (x) == PLUS || GET_CODE (x) == MINUS \
|| (GET_CODE (x) == LO_SUM)) \
&& (CONSTANT_P (XEXP (x, 0)) \
|| CONSTANT_P (XEXP (x, 1)))))
/* Turns on the fed_by_spec_load flag for insns fed by load_insn. */
......@@ -2497,7 +2497,7 @@ propagate_deps (bb, pred_deps)
succ_deps->last_pending_memory_flush
= concat_INSN_LIST (pred_deps->last_pending_memory_flush,
succ_deps->last_pending_memory_flush);
succ_deps->pending_lists_length += pred_deps->pending_lists_length;
succ_deps->pending_flush_length += pred_deps->pending_flush_length;
......@@ -2657,7 +2657,7 @@ debug_dependencies ()
INSN_DEP_COUNT (insn),
INSN_PRIORITY (insn),
insn_cost (insn, 0, 0));
if (recog_memoized (insn) < 0)
fprintf (sched_dump, "nothing");
else
......@@ -2996,7 +2996,7 @@ schedule_insns (dump_file)
init_regions ();
current_sched_info = &region_sched_info;
/* Schedule every region in the subroutine. */
for (rgn = 0; rgn < nr_regions; rgn++)
schedule_region (rgn);
......
......@@ -677,13 +677,13 @@ print_pattern (buf, x, verbose)
&& XEXP (COND_EXEC_TEST (x), 1) == const0_rtx)
print_value (t1, XEXP (COND_EXEC_TEST (x), 0), verbose);
else if (GET_CODE (COND_EXEC_TEST (x)) == EQ
&& XEXP (COND_EXEC_TEST (x), 1) == const0_rtx)
{
&& XEXP (COND_EXEC_TEST (x), 1) == const0_rtx)
{
t1[0] = '!';
print_value (t1 + 1, XEXP (COND_EXEC_TEST (x), 0), verbose);
}
else
print_value (t1, COND_EXEC_TEST (x), verbose);
print_value (t1, COND_EXEC_TEST (x), verbose);
print_pattern (t2, COND_EXEC_CODE (x), verbose);
sprintf (buf, "(%s) %s", t1, t2);
break;
......
......@@ -782,7 +782,7 @@ sdbout_symbol (decl, local)
if (!DECL_RTL_SET_P (decl))
return;
SET_DECL_RTL (decl,
SET_DECL_RTL (decl,
eliminate_regs (DECL_RTL (decl), 0, NULL_RTX));
#ifdef LEAF_REG_REMAP
if (current_function_uses_only_leaf_regs)
......@@ -858,12 +858,12 @@ sdbout_symbol (decl, local)
if (TREE_PUBLIC (decl))
{
PUT_SDB_VAL (XEXP (value, 0));
PUT_SDB_SCL (C_EXT);
PUT_SDB_SCL (C_EXT);
}
else
{
PUT_SDB_VAL (XEXP (value, 0));
PUT_SDB_SCL (C_STAT);
PUT_SDB_SCL (C_STAT);
}
}
else if (regno >= 0)
......@@ -1759,7 +1759,7 @@ sdbout_init (input_file_name)
if (DECL_NAME (t) && IDENTIFIER_POINTER (DECL_NAME (t)) != 0
&& !strcmp (IDENTIFIER_POINTER (DECL_NAME (t)), "__vtbl_ptr_type"))
sdbout_symbol (t, 0);
#endif
#endif
#ifdef SDB_ALLOW_FORWARD_REFERENCES
ggc_add_tree_root (&anonymous_types, 1);
......
......@@ -86,7 +86,7 @@ identify_call_return_value (cp, p_hard_return, p_soft_return)
/* If we didn't get a single hard register (e.g. a parallel), give up. */
if (GET_CODE (hard) != REG)
return 0;
/* Stack adjustment done after call may appear here. */
insn = skip_stack_adjustment (insn);
if (! insn)
......@@ -101,7 +101,7 @@ identify_call_return_value (cp, p_hard_return, p_soft_return)
insn = NEXT_INSN (insn);
if (! insn)
return 0;
/* We're looking for a source of the hard return register. */
set = single_set (insn);
if (! set || SET_SRC (set) != hard)
......@@ -168,7 +168,7 @@ skip_copy_to_return_value (orig_insn)
/* The destination must be the same as the called function's return
value to ensure that any return value is put in the same place by the
current function and the function we're calling.
current function and the function we're calling.
Further, the source must be the same as the pseudo into which the
called function's return value was copied. Otherwise we're returning
......@@ -554,7 +554,7 @@ replace_call_placeholder (insn, use)
pass above from deleting it as unused. */
if (XEXP (PATTERN (insn), 3))
LABEL_PRESERVE_P (XEXP (PATTERN (insn), 3)) = 0;
/* "Delete" the placeholder insn. */
remove_insn (insn);
}
......@@ -586,7 +586,7 @@ optimize_sibling_and_tail_recursive_calls ()
if (n_basic_blocks == 0)
return;
/* If we are using sjlj exceptions, we may need to add a call to
/* If we are using sjlj exceptions, we may need to add a call to
_Unwind_SjLj_Unregister at exit of the function. Which means
that we cannot do any sibcall transformations. */
if (USING_SJLJ_EXCEPTIONS && current_function_has_exception_handlers ())
......@@ -676,7 +676,7 @@ optimize_sibling_and_tail_recursive_calls ()
sibling call optimizations, but not tail recursion.
Similarly if we use varargs or stdarg since they implicitly
may take the address of an argument. */
if (current_function_calls_alloca
if (current_function_calls_alloca
|| current_function_varargs || current_function_stdarg)
sibcall = 0;
......@@ -709,8 +709,8 @@ optimize_sibling_and_tail_recursive_calls ()
successful_sibling_call = 1;
replaced_call_placeholder = 1;
replace_call_placeholder (insn,
tailrecursion != 0
replace_call_placeholder (insn,
tailrecursion != 0
? sibcall_use_tail_recursion
: sibcall != 0
? sibcall_use_sibcall
......@@ -724,11 +724,11 @@ optimize_sibling_and_tail_recursive_calls ()
tree arg;
/* A sibling call sequence invalidates any REG_EQUIV notes made for
this function's incoming arguments.
this function's incoming arguments.
At the start of RTL generation we know the only REG_EQUIV notes
in the rtl chain are those for incoming arguments, so we can safely
flush any REG_EQUIV note.
flush any REG_EQUIV note.
This is (slight) overkill. We could keep track of the highest
argument we clobber and be more selective in removing notes, but it
......@@ -738,7 +738,7 @@ optimize_sibling_and_tail_recursive_calls ()
/* A sibling call sequence also may invalidate RTX_UNCHANGING_P
flag of some incoming arguments MEM RTLs, because it can write into
those slots. We clear all those bits now.
This is (slight) overkill, we could keep track of which arguments
we actually write into. */
for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
......@@ -749,8 +749,8 @@ optimize_sibling_and_tail_recursive_calls ()
/* Similarly, invalidate RTX_UNCHANGING_P for any incoming
arguments passed in registers. */
for (arg = DECL_ARGUMENTS (current_function_decl);
arg;
for (arg = DECL_ARGUMENTS (current_function_decl);
arg;
arg = TREE_CHAIN (arg))
{
if (REG_P (DECL_RTL (arg)))
......@@ -758,7 +758,7 @@ optimize_sibling_and_tail_recursive_calls ()
}
}
/* There may have been NOTE_INSN_BLOCK_{BEGIN,END} notes in the
/* There may have been NOTE_INSN_BLOCK_{BEGIN,END} notes in the
CALL_PLACEHOLDER alternatives that we didn't emit. Rebuild the
lexical block tree to correspond to the notes that still exist. */
if (replaced_call_placeholder)
......
......@@ -43,7 +43,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
virtual regs here because the simplify_*_operation routines are called
by integrate.c, which is called before virtual register instantiation.
?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
a header file so that their definitions can be shared with the
simplification routines in simplify-rtx.c. Until then, do not
change these macros without also changing the copy in simplify-rtx.c. */
......@@ -113,7 +113,7 @@ neg_const_int (mode, i)
}
/* Make a binary operation by properly ordering the operands and
/* Make a binary operation by properly ordering the operands and
seeing if the expression folds. */
rtx
......@@ -300,7 +300,7 @@ simplify_replace_rtx (x, old, new)
rtx op0 = simplify_replace_rtx (XEXP (x, 0), old, new);
return
simplify_gen_ternary (code, mode,
simplify_gen_ternary (code, mode,
(op_mode != VOIDmode
? op_mode
: GET_MODE (op0)),
......@@ -677,7 +677,7 @@ simplify_unary_operation (code, mode, op, op_mode)
return convert_memory_address (Pmode, op);
break;
#endif
default:
break;
}
......@@ -964,7 +964,7 @@ simplify_binary_operation (code, mode, op0, op1)
}
/* If one of the operands is a PLUS or a MINUS, see if we can
simplify this by the associative law.
simplify this by the associative law.
Don't use the associative law for floating point.
The inaccuracy makes it nonassociative,
and subtle programs can break if operations are associated. */
......@@ -1013,7 +1013,7 @@ simplify_binary_operation (code, mode, op0, op1)
#endif
return xop00;
}
break;
break;
case MINUS:
/* We can't assume x-x is 0 even with non-IEEE floating point,
......@@ -1102,7 +1102,7 @@ simplify_binary_operation (code, mode, op0, op1)
return simplify_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
/* If one of the operands is a PLUS or a MINUS, see if we can
simplify this by the associative law.
simplify this by the associative law.
Don't use the associative law for floating point.
The inaccuracy makes it nonassociative,
and subtle programs can break if operations are associated. */
......@@ -1280,7 +1280,7 @@ simplify_binary_operation (code, mode, op0, op1)
if (! REAL_VALUES_EQUAL (d, dconst0))
{
REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
return gen_rtx_MULT (mode, op0,
return gen_rtx_MULT (mode, op0,
CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
}
}
......@@ -1320,14 +1320,14 @@ simplify_binary_operation (code, mode, op0, op1)
break;
case SMIN:
if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (trueop1) == CONST_INT
if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (trueop1) == CONST_INT
&& INTVAL (trueop1) == (HOST_WIDE_INT) 1 << (width -1)
&& ! side_effects_p (op0))
return op1;
else if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
return op0;
break;
case SMAX:
if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (trueop1) == CONST_INT
&& ((unsigned HOST_WIDE_INT) INTVAL (trueop1)
......@@ -1344,7 +1344,7 @@ simplify_binary_operation (code, mode, op0, op1)
else if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
return op0;
break;
case UMAX:
if (trueop1 == constm1_rtx && ! side_effects_p (op0))
return op1;
......@@ -1362,7 +1362,7 @@ simplify_binary_operation (code, mode, op0, op1)
default:
abort ();
}
return 0;
}
......@@ -1549,9 +1549,9 @@ simplify_binary_operation (code, mode, op0, op1)
Rather than test for specific case, we do this by a brute-force method
and do all possible simplifications until no more changes occur. Then
we rebuild the operation.
we rebuild the operation.
If FORCE is true, then always generate the rtx. This is used to
If FORCE is true, then always generate the rtx. This is used to
canonicalize stuff emitted from simplify_gen_binary. Note that this
can still fail if the rtx is too complex. It won't fail just because
the result is not 'simpler' than the input, however. */
......@@ -1588,7 +1588,7 @@ simplify_plus_minus (code, mode, op0, op1, force)
int i, j;
memset ((char *) ops, 0, sizeof ops);
/* Set up the two operands and then expand them until nothing has been
changed. If we run out of room in our array, give up; this should
almost never happen. */
......@@ -1712,7 +1712,7 @@ simplify_plus_minus (code, mode, op0, op1, force)
tem = simplify_binary_operation (ncode, mode, lhs, rhs);
/* Reject "simplifications" that just wrap the two
/* Reject "simplifications" that just wrap the two
arguments in a CONST. Failure to do so can result
in infinite recursion with simplify_binary_operation
when it calls us to simplify CONST operations. */
......@@ -1784,7 +1784,7 @@ simplify_plus_minus (code, mode, op0, op1, force)
is also an improvement, so accept it. */
if (!force
&& (n_ops + n_consts > input_ops
|| (n_ops + n_consts == input_ops && n_consts <= input_consts)))
|| (n_ops + n_consts == input_ops && n_consts <= input_consts)))
return NULL_RTX;
/* Put a non-negated operand first. If there aren't any, make all
......@@ -1955,7 +1955,7 @@ simplify_relational_operation (code, mode, op0, op1)
l0u = l0s = INTVAL (trueop0);
h0u = h0s = HWI_SIGN_EXTEND (l0s);
}
if (GET_CODE (trueop1) == CONST_DOUBLE)
{
l1u = l1s = CONST_DOUBLE_LOW (trueop1);
......@@ -2044,7 +2044,7 @@ simplify_relational_operation (code, mode, op0, op1)
&& INTEGRAL_MODE_P (mode))
return const0_rtx;
break;
default:
break;
}
......@@ -2188,7 +2188,7 @@ simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
{
HOST_WIDE_INT t = INTVAL (op1);
HOST_WIDE_INT f = INTVAL (op2);
if (t == STORE_FLAG_VALUE && f == 0)
code = GET_CODE (op0);
else if (t == 0 && f == STORE_FLAG_VALUE)
......@@ -2288,7 +2288,7 @@ simplify_subreg (outermode, op, innermode, byte)
val = part ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op);
offset %= HOST_BITS_PER_WIDE_INT;
/* We've already picked the word we want from a double, so
/* We've already picked the word we want from a double, so
pretend this is actually an integer. */
innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
......@@ -2553,7 +2553,7 @@ simplify_gen_subreg (outermode, op, innermode, byte)
maintain and improve. It's totally silly that when we add a
simplification that it needs to be added to 4 places (3 for RTL
simplification and 1 for tree simplification. */
rtx
simplify_rtx (x)
rtx x;
......@@ -2597,7 +2597,7 @@ simplify_rtx (x)
case 'x':
/* The only case we try to handle is a SUBREG. */
if (code == SUBREG)
return simplify_gen_subreg (mode, SUBREG_REG (x),
return simplify_gen_subreg (mode, SUBREG_REG (x),
GET_MODE (SUBREG_REG (x)),
SUBREG_BYTE (x));
return NULL;
......
......@@ -2,19 +2,19 @@
Copyright (C) 2000, 2001, 2002 Free Software Foundation, Inc.
Original framework by Daniel Berlin <dan@cgsoftware.com>
Fleshed out and major cleanups by Jeff Law <law@redhat.com>
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 2, or (at your option) any later
version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
......@@ -44,7 +44,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
5. Another simple SSA DCE pass to remove dead code exposed
by CCP.
When we exit, we are still in SSA form.
When we exit, we are still in SSA form.
Potential further enhancements:
......@@ -83,7 +83,7 @@ typedef enum
VARYING
} latticevalue;
/* Main structure for CCP.
/* Main structure for CCP.
Contains the lattice value and, if it's a constant, the constant
value. */
......@@ -185,7 +185,7 @@ visit_phi_node (phi_node, block)
/* If the current value of PHI_NODE is UNDEFINED and one
node in PHI_NODE is CONSTANT, then the new value of the
PHI is that CONSTANT. Note this can turn into VARYING
if we find another distinct constant later. */
if we find another distinct constant later. */
if (phi_node_lattice_val == UNDEFINED
&& phi_node_expr == NULL
&& current_parm_lattice_val == CONSTANT)
......@@ -288,7 +288,7 @@ visit_expression (insn, block)
}
/* Hard registers are not put in SSA form and thus we must consider
them varying. All the more reason to avoid hard registers in
them varying. All the more reason to avoid hard registers in
RTL until as late as possible in the compilation. */
if (GET_CODE (dest) == REG && REGNO (dest) < FIRST_PSEUDO_REGISTER)
{
......@@ -451,7 +451,7 @@ visit_expression (insn, block)
rtx simplified = NULL;
/* We've got some kind of INSN. If it's simple, try to evaluate
it and record the results.
it and record the results.
We already know this insn is a single_set and that it sets
a pseudo register. So we just need to extract the source
......@@ -511,7 +511,7 @@ visit_expression (insn, block)
defs_to_undefined (insn);
break;
}
/* Simplify source operands to whatever known values they
may have. */
if (GET_CODE (src0) == REG
......@@ -542,7 +542,7 @@ visit_expression (insn, block)
defs_to_undefined (insn);
break;
}
/* Simplify source operands to whatever known values they
may have. */
if (GET_CODE (src0) == REG
......@@ -579,7 +579,7 @@ visit_expression (insn, block)
defs_to_undefined (insn);
break;
}
/* Simplify source operands to whatever known values they
may have. */
if (GET_CODE (src0) == REG
......@@ -602,7 +602,7 @@ visit_expression (insn, block)
src0, src1, src2);
break;
}
default:
defs_to_varying (insn);
}
......@@ -617,7 +617,7 @@ visit_expression (insn, block)
values[REGNO (dest)].const_value = simplified;
}
else
defs_to_varying (insn);
defs_to_varying (insn);
}
}
......@@ -665,11 +665,11 @@ examine_flow_edges ()
currinsn = NEXT_INSN (currinsn);
}
/* Don't forget the last insn in the block. */
if (INSN_P (currinsn))
visit_expression (currinsn, succ_block);
/* If we haven't looked at the next block, and it has a
single successor, add it onto the worklist. This is because
if we only have one successor, we know it gets executed,
......@@ -702,7 +702,7 @@ follow_def_use_chains ()
/* Pick an entry off the worklist (it does not matter which
entry we pick). */
member = sbitmap_first_set_bit (ssa_edges);
member = sbitmap_first_set_bit (ssa_edges);
RESET_BIT (ssa_edges, member);
/* Iterate through all the uses of this entry. */
......@@ -716,7 +716,7 @@ follow_def_use_chains ()
{
if (TEST_BIT (executable_blocks, BLOCK_NUM (useinsn)))
visit_phi_node (useinsn, BLOCK_FOR_INSN (useinsn));
}
}
else
{
if (TEST_BIT (executable_blocks, BLOCK_NUM (useinsn)))
......@@ -727,7 +727,7 @@ follow_def_use_chains ()
}
/* Examine each edge to see if we were able to prove any were
not executable.
not executable.
If an edge is not executable, then we can remove its alternative
in PHI nodes as the destination of the edge, we can simplify the
......@@ -761,7 +761,7 @@ optimize_unexecutable_edges (edges, executable_edges)
remove_phi_alternative (PATTERN (insn), edge->src);
if (rtl_dump_file)
fprintf (rtl_dump_file,
"Removing alternative for bb %d of phi %d\n",
"Removing alternative for bb %d of phi %d\n",
edge->src->index, SSA_NAME (PATTERN (insn)));
insn = NEXT_INSN (insn);
}
......@@ -834,7 +834,7 @@ optimize_unexecutable_edges (edges, executable_edges)
}
}
}
/* Perform substitution of known values for pseudo registers.
??? Note we do not do simplifications or constant folding here, it
......@@ -842,7 +842,7 @@ optimize_unexecutable_edges (edges, executable_edges)
anyway. Consider that if the simplification would result in an
expression that produces a constant value that the value would
have been discovered and recorded already.
We perform two transformations. First, we initialize pseudos to their
known constant values at their definition point. Second, we try to
replace uses with the known constant value. */
......@@ -901,13 +901,13 @@ ssa_ccp_substitute_constants ()
&& (GET_CODE (useinsn) == INSN
|| GET_CODE (useinsn) == JUMP_INSN))
{
if (validate_replace_src (regno_reg_rtx [i],
values[i].const_value,
useinsn))
{
if (rtl_dump_file)
fprintf (rtl_dump_file,
fprintf (rtl_dump_file,
"Register %d in insn %d replaced with constant\n",
i, INSN_UID (useinsn));
INSN_CODE (useinsn) = -1;
......@@ -915,7 +915,7 @@ ssa_ccp_substitute_constants ()
BLOCK_FOR_INSN (useinsn),
useinsn);
}
}
}
}
......@@ -1009,7 +1009,7 @@ ssa_const_prop ()
for (i = 0; i < VARRAY_SIZE (ssa_definition); i++)
{
if (i < FIRST_PSEUDO_REGISTER)
values[i].lattice_val = VARYING;
values[i].lattice_val = VARYING;
else
values[i].lattice_val = UNDEFINED;
values[i].const_value = NULL;
......@@ -1085,7 +1085,7 @@ ssa_const_prop ()
sbitmap_free (ssa_edges);
ssa_edges = NULL;
free_edge_list (edges);
edges = NULL;
......@@ -1178,7 +1178,7 @@ ssa_fast_dce (df)
== NOTE_INSN_DELETED))
|| side_effects_p (PATTERN (VARRAY_RTX (ssa_definition, reg))))
continue;
/* Iterate over the uses of this register. If we can not find
any uses that have not been deleted, then the definition of
this register is dead. */
......@@ -1200,7 +1200,7 @@ ssa_fast_dce (df)
/* If we did not find a use of this register, then the definition
of this register is dead. */
if (! found_use)
{
rtx def = VARRAY_RTX (ssa_definition, reg);
......@@ -1221,5 +1221,5 @@ ssa_fast_dce (df)
/* Update the use-def chains in the df_analyzer as needed. */
df_analyse (df_analyzer, 0,
DF_RD_CHAIN | DF_RU_CHAIN | DF_REG_INFO | DF_HARD_REGS);
DF_RD_CHAIN | DF_RU_CHAIN | DF_REG_INFO | DF_HARD_REGS);
}
......@@ -370,7 +370,7 @@ find_inherently_necessary (x)
return !0;
else
switch (GET_CODE (x))
{
{
case CALL_INSN:
case BARRIER:
case PREFETCH:
......@@ -691,7 +691,7 @@ ssa_eliminate_dead_code ()
remove_edge (temp);
}
/* Create an edge from this block to the post dominator.
/* Create an edge from this block to the post dominator.
What about the PHI nodes at the target? */
make_edge (bb, pdom_bb, 0);
......@@ -711,7 +711,7 @@ ssa_eliminate_dead_code ()
else if (!JUMP_P (insn))
delete_insn_bb (insn);
});
/* Remove fake edges from the CFG. */
remove_fake_edges ();
......
......@@ -496,7 +496,7 @@ mark_block_nesting (n)
ggc_mark_tree (n->data.block.cleanups);
ggc_mark_tree (n->data.block.outer_cleanups);
for (l = n->data.block.label_chain; l != NULL; l = l->next)
for (l = n->data.block.label_chain; l != NULL; l = l->next)
{
ggc_mark (l);
ggc_mark_tree (l->label);
......@@ -848,7 +848,7 @@ expand_goto (label)
emit_indirect_jump (handler_slot);
}
/* Search backwards to the jump insn and mark it as a
/* Search backwards to the jump insn and mark it as a
non-local goto. */
for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
{
......@@ -1047,8 +1047,8 @@ expand_fixup (tree_label, rtl_label, last_insn)
as a placeholder. */
{
rtx original_before_jump
= last_insn ? last_insn : get_last_insn ();
rtx original_before_jump
= last_insn ? last_insn : get_last_insn ();
rtx start;
rtx end;
tree block;
......@@ -1066,17 +1066,17 @@ expand_fixup (tree_label, rtl_label, last_insn)
= block;
}
start_sequence ();
start = emit_note (NULL, NOTE_INSN_BLOCK_BEG);
start_sequence ();
start = emit_note (NULL, NOTE_INSN_BLOCK_BEG);
if (cfun->x_whole_function_mode_p)
NOTE_BLOCK (start) = block;
fixup->before_jump = emit_note (NULL, NOTE_INSN_DELETED);
end = emit_note (NULL, NOTE_INSN_BLOCK_END);
if (cfun->x_whole_function_mode_p)
NOTE_BLOCK (end) = block;
fixup->context = block;
end_sequence ();
emit_insns_after (start, original_before_jump);
fixup->context = block;
end_sequence ();
emit_insns_after (start, original_before_jump);
}
fixup->block_start_count = current_block_start_count;
......@@ -1382,7 +1382,7 @@ parse_output_constraint (constraint_p, operand_num, ninputs, noutputs,
case '=':
error ("operand constraint contains incorrectly positioned '+' or '='");
return false;
case '%':
if (operand_num + 1 == ninputs + noutputs)
{
......@@ -1419,7 +1419,7 @@ parse_output_constraint (constraint_p, operand_num, ninputs, noutputs,
*allows_reg = true;
*allows_mem = true;
break;
case 'p': case 'r':
*allows_reg = true;
break;
......@@ -1575,7 +1575,7 @@ parse_input_constraint (constraint_p, input_num, ninputs, noutputs, ninout,
OUTPUTS is a list of output arguments (lvalues); INPUTS a list of inputs.
Each output or input has an expression in the TREE_VALUE and
and a tree list in TREE_PURPOSE which in turn contains a constraint
name in TREE_VALUE (or NULL_TREE) and a constraint string
name in TREE_VALUE (or NULL_TREE) and a constraint string
in TREE_PURPOSE.
CLOBBERS is a list of STRING_CST nodes each naming a hard register
that is clobbered by this insn.
......@@ -1752,7 +1752,7 @@ expand_asm_operands (string, outputs, inputs, clobbers, vol, filename, line)
if ((! allows_mem && GET_CODE (output_rtx[i]) == MEM)
|| GET_CODE (output_rtx[i]) == CONCAT)
{
real_output_rtx[i] = protect_from_queue (output_rtx[i], 1);
real_output_rtx[i] = protect_from_queue (output_rtx[i], 1);
output_rtx[i] = gen_reg_rtx (GET_MODE (output_rtx[i]));
if (is_inout)
emit_move_insn (output_rtx[i], real_output_rtx[i]);
......@@ -1781,7 +1781,7 @@ expand_asm_operands (string, outputs, inputs, clobbers, vol, filename, line)
body = gen_rtx_ASM_OPERANDS ((noutputs == 0 ? VOIDmode
: GET_MODE (output_rtx[0])),
TREE_STRING_POINTER (string),
TREE_STRING_POINTER (string),
empty_string, 0, argvec, constraintvec,
filename, line);
......@@ -2127,7 +2127,7 @@ resolve_operand_names (string, outputs, inputs, pconstraints)
/* A subroutine of resolve_operand_names. P points to the '[' for a
potential named operand of the form [<name>]. In place, replace
the name and brackets with a number. Return a pointer to the
the name and brackets with a number. Return a pointer to the
balance of the string after substitution. */
static char *
......@@ -2697,7 +2697,7 @@ expand_end_loop ()
the end of the entry condtional. Without this, our lexical scan
can't tell the difference between an entry conditional and a
body conditional that exits the loop. Mistaking the two means
that we can misplace the NOTE_INSN_LOOP_CONT note, which can
that we can misplace the NOTE_INSN_LOOP_CONT note, which can
screw up loop unrolling.
Things will be oh so much better when loop optimization is done
......@@ -2738,7 +2738,7 @@ expand_end_loop ()
/* Likewise for debug scopes. In this case we'll either (1) move
all of the notes if they are properly nested or (2) leave the
notes alone and only rotate the loop at high optimization
notes alone and only rotate the loop at high optimization
levels when we expect to scrog debug info. */
else if (NOTE_LINE_NUMBER (etc_note) == NOTE_INSN_BLOCK_BEG)
debug_blocks++;
......@@ -2890,7 +2890,7 @@ expand_exit_loop_if_false (whichloop, cond)
}
/* Like expand_exit_loop_if_false except also emit a note marking
the end of the conditional. Should only be used immediately
the end of the conditional. Should only be used immediately
after expand_loop_start. */
int
......@@ -3114,7 +3114,7 @@ expand_return (retval)
/* Treat this like a return of no value from a function that
returns a value. */
expand_null_return ();
return;
return;
}
else if (TREE_CODE (retval) == RESULT_DECL)
retval_rhs = retval;
......@@ -5251,7 +5251,7 @@ check_for_full_enumeration_handling (type)
chain && !tree_int_cst_equal (n->low, TREE_VALUE (chain));
chain = TREE_CHAIN (chain))
;
if (!chain)
{
if (TYPE_NAME (type) == 0)
......@@ -5271,7 +5271,7 @@ check_for_full_enumeration_handling (type)
chain && !tree_int_cst_equal (n->high, TREE_VALUE (chain));
chain = TREE_CHAIN (chain))
;
if (!chain)
{
if (TYPE_NAME (type) == 0)
......@@ -5291,11 +5291,11 @@ check_for_full_enumeration_handling (type)
/* Free CN, and its children. */
static void
static void
free_case_nodes (cn)
case_node_ptr cn;
{
if (cn)
if (cn)
{
free_case_nodes (cn->left);
free_case_nodes (cn->right);
......@@ -5537,21 +5537,21 @@ expand_end_case_type (orig_index, orig_type)
{
index_type = thiscase->data.case_stmt.nominal_type;
/* Index jumptables from zero for suitable values of
/* Index jumptables from zero for suitable values of
minval to avoid a subtraction. */
if (! optimize_size
&& compare_tree_int (minval, 0) > 0
&& compare_tree_int (minval, 3) < 0)
{
minval = integer_zero_node;
range = maxval;
}
if (! optimize_size
&& compare_tree_int (minval, 0) > 0
&& compare_tree_int (minval, 3) < 0)
{
minval = integer_zero_node;
range = maxval;
}
if (! try_tablejump (index_type, index_expr, minval, range,
table_label, default_label))
abort ();
}
/* Get table of labels to jump to, in order of case index. */
ncases = tree_low_cst (range, 0) + 1;
......@@ -5564,11 +5564,11 @@ expand_end_case_type (orig_index, orig_type)
value since that should fit in a HOST_WIDE_INT while the
actual values may not. */
HOST_WIDE_INT i_low
= tree_low_cst (fold (build (MINUS_EXPR, index_type,
n->low, minval)), 1);
= tree_low_cst (fold (build (MINUS_EXPR, index_type,
n->low, minval)), 1);
HOST_WIDE_INT i_high
= tree_low_cst (fold (build (MINUS_EXPR, index_type,
n->high, minval)), 1);
= tree_low_cst (fold (build (MINUS_EXPR, index_type,
n->high, minval)), 1);
HOST_WIDE_INT i;
for (i = i_low; i <= i_high; i ++)
......@@ -6400,7 +6400,7 @@ emit_case_nodes (index, node, default_label, index_type)
new_bound = expand_expr (fold (build (MINUS_EXPR, type,
high, low)),
NULL_RTX, mode, 0);
emit_cmp_and_jump_insns (new_index, new_bound, GT, NULL_RTX,
mode, 1, default_label);
}
......
......@@ -180,7 +180,7 @@ variable_size (size)
}
if (immediate_size_expand)
/* NULL_RTX is not defined; neither is the rtx type.
/* NULL_RTX is not defined; neither is the rtx type.
Also, we would like to pass const0_rtx here, but don't have it. */
expand_expr (size, expand_expr (integer_zero_node, NULL_RTX, VOIDmode, 0),
VOIDmode, 0);
......@@ -283,7 +283,7 @@ int_mode_for_mode (mode)
case MODE_RANDOM:
if (mode == BLKmode)
break;
break;
/* ... fall through ... */
......@@ -381,7 +381,7 @@ layout_decl (decl, known_align)
&& (DECL_ALIGN (decl) == 0
|| (! (code == FIELD_DECL && DECL_PACKED (decl))
&& TYPE_ALIGN (type) > DECL_ALIGN (decl))))
{
{
DECL_ALIGN (decl) = TYPE_ALIGN (type);
DECL_USER_ALIGN (decl) = 0;
}
......@@ -407,7 +407,7 @@ layout_decl (decl, known_align)
}
}
/* See if we can use an ordinary integer mode for a bit-field.
/* See if we can use an ordinary integer mode for a bit-field.
Conditions are: a fixed size that is correct for another mode
and occupying a complete byte or bytes on proper boundary. */
if (code == FIELD_DECL && DECL_BIT_FIELD (decl)
......@@ -478,7 +478,7 @@ set_lang_adjust_rli (f)
/* Begin laying out type T, which may be a RECORD_TYPE, UNION_TYPE, or
QUAL_UNION_TYPE. Return a pointer to a struct record_layout_info which
is to be passed to all other layout functions for this record. It is the
responsibility of the caller to call `free' for the storage returned.
responsibility of the caller to call `free' for the storage returned.
Note that garbage collection is not permitted until we finish laying
out the record. */
......@@ -486,7 +486,7 @@ record_layout_info
start_record_layout (t)
tree t;
{
record_layout_info rli
record_layout_info rli
= (record_layout_info) xmalloc (sizeof (struct record_layout_info_s));
rli->t = t;
......@@ -587,7 +587,7 @@ normalize_offset (poffset, pbitpos, off_align)
= size_binop (PLUS_EXPR, *poffset,
size_binop (MULT_EXPR, convert (sizetype, extra_aligns),
size_int (off_align / BITS_PER_UNIT)));
*pbitpos
= size_binop (FLOOR_MOD_EXPR, *pbitpos, bitsize_int (off_align));
}
......@@ -654,7 +654,7 @@ place_union_field (rli, field)
unsigned int desired_align;
layout_decl (field, 0);
DECL_FIELD_OFFSET (field) = size_zero_node;
DECL_FIELD_BIT_OFFSET (field) = bitsize_zero_node;
SET_DECL_OFFSET_ALIGN (field, BIGGEST_ALIGNMENT);
......@@ -685,7 +685,7 @@ place_union_field (rli, field)
entire union to have `int' alignment. */
if (PCC_BITFIELD_TYPE_MATTERS && DECL_BIT_FIELD_TYPE (field))
{
rli->record_align = MAX (rli->record_align,
rli->record_align = MAX (rli->record_align,
TYPE_ALIGN (TREE_TYPE (field)));
rli->unpadded_align = MAX (rli->unpadded_align,
TYPE_ALIGN (TREE_TYPE (field)));
......@@ -697,7 +697,7 @@ place_union_field (rli, field)
if (TREE_CODE (rli->t) == UNION_TYPE)
rli->offset = size_binop (MAX_EXPR, rli->offset, DECL_SIZE_UNIT (field));
else if (TREE_CODE (rli->t) == QUAL_UNION_TYPE)
rli->offset = fold (build (COND_EXPR, sizetype,
rli->offset = fold (build (COND_EXPR, sizetype,
DECL_QUALIFIER (field),
DECL_SIZE_UNIT (field), rli->offset));
}
......@@ -721,7 +721,7 @@ place_field (rli, field)
unsigned int user_align;
/* The type of this field. */
tree type = TREE_TYPE (field);
if (TREE_CODE (field) == ERROR_MARK || TREE_CODE (type) == ERROR_MARK)
return;
......@@ -806,7 +806,7 @@ place_field (rli, field)
}
else
desired_align = 1;
}
}
else
#ifdef PCC_BITFIELD_TYPE_MATTERS
if (PCC_BITFIELD_TYPE_MATTERS && type != error_mark_node
......@@ -1121,7 +1121,7 @@ finalize_record_size (rli)
if (warn_padded && TREE_CONSTANT (unpadded_size)
&& simple_cst_equal (unpadded_size, TYPE_SIZE (rli->t)) == 0)
warning ("padding struct size to alignment boundary");
if (warn_packed && TREE_CODE (rli->t) == RECORD_TYPE
&& TYPE_PACKED (rli->t) && ! rli->packed_maybe_necessary
&& TREE_CONSTANT (unpadded_size))
......@@ -1208,7 +1208,7 @@ compute_record_mode (type)
return;
bitpos = int_bit_position (field);
/* Must be BLKmode if any field crosses a word boundary,
since extract_bit_field can't handle that in registers. */
if (bitpos / BITS_PER_WORD
......@@ -1680,7 +1680,7 @@ layout_type (type)
/* Compute the final TYPE_SIZE, TYPE_ALIGN, etc. for TYPE. For
records and unions, finish_record_layout already called this
function. */
if (TREE_CODE (type) != RECORD_TYPE
if (TREE_CODE (type) != RECORD_TYPE
&& TREE_CODE (type) != UNION_TYPE
&& TREE_CODE (type) != QUAL_UNION_TYPE)
finalize_type_size (type);
......
......@@ -110,7 +110,7 @@ get_identifier (text)
/* Identical to get_identifier, except that the length is assumed
known. */
tree
get_identifier_with_length (text, length)
const char *text;
......
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