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riscv-gcc-1
Commit 78168632 by Uros Bizjak Committed by Uros Bizjak
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i386.md (ST?_REG, MM?_REG): New constants. 

	* config/i386/i386.md (ST?_REG, MM?_REG): New constants.
	(*call_1_rex64_ms_sysv): Use named constants instead of magic
	numbers to describe clobbbered registers.
	(*call_value_0_rex64_ms_sysv): Ditto.
	* config/i386/mmx.md (emms): Ditto.
	(femms): Ditto.

From-SVN: r144554
parent 63553059
Showing with 79 additions and 54 deletions
gcc/ChangeLog
2009-03-02 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (ST?_REG, MM?_REG): New constants.
(*call_1_rex64_ms_sysv): Use named constants instead of magic
numbers to describe clobbbered registers.
(*call_value_0_rex64_ms_sysv): Ditto.
* config/i386/mmx.md (emms): Ditto.
(femms): Ditto.
2009-03-02 Richard Sandiford <rdsandiford@googlemail.com>
* config/mips/mips.c (mips_mdebug_abi_name): Fix the handling
......
gcc/config/i386/i386.h
......@@ -859,7 +859,7 @@ enum target_cpu_default
1, 1, 1, 1, 1, \
/*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/ \
0, 0, 0, 0, 0, 0, 0, 0, \
/*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/ \
/* mm0, mm1, mm2, mm3, mm4, mm5, mm6, mm7*/ \
0, 0, 0, 0, 0, 0, 0, 0, \
/* r8, r9, r10, r11, r12, r13, r14, r15*/ \
2, 2, 2, 2, 2, 2, 2, 2, \
......@@ -887,7 +887,7 @@ enum target_cpu_default
1, 1, 1, 1, 1, \
/*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/ \
1, 1, 1, 1, 1, 1, 1, 1, \
/*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/ \
/* mm0, mm1, mm2, mm3, mm4, mm5, mm6, mm7*/ \
1, 1, 1, 1, 1, 1, 1, 1, \
/* r8, r9, r10, r11, r12, r13, r14, r15*/ \
1, 1, 1, 1, 2, 2, 2, 2, \
......
gcc/config/i386/i386.md
......@@ -264,6 +264,14 @@
(DI_REG 5)
(BP_REG 6)
(SP_REG 7)
(ST0_REG 8)
(ST1_REG 9)
(ST2_REG 10)
(ST3_REG 11)
(ST4_REG 12)
(ST5_REG 13)
(ST6_REG 14)
(ST7_REG 15)
(FLAGS_REG 17)
(FPSR_REG 18)
(FPCR_REG 19)
......@@ -275,6 +283,14 @@
(XMM5_REG 26)
(XMM6_REG 27)
(XMM7_REG 28)
(MM0_REG 29)
(MM1_REG 30)
(MM2_REG 31)
(MM3_REG 32)
(MM4_REG 33)
(MM5_REG 34)
(MM6_REG 35)
(MM7_REG 36)
(R10_REG 39)
(R11_REG 40)
(R13_REG 42)
......@@ -15045,16 +15061,16 @@
[(call (mem:QI (match_operand:DI 0 "call_insn_operand" "rsm"))
(match_operand 1 "" ""))
(unspec [(const_int 0)] UNSPEC_MS_TO_SYSV_CALL)
(clobber (reg:TI 27))
(clobber (reg:TI 28))
(clobber (reg:TI 45))
(clobber (reg:TI 46))
(clobber (reg:TI 47))
(clobber (reg:TI 48))
(clobber (reg:TI 49))
(clobber (reg:TI 50))
(clobber (reg:TI 51))
(clobber (reg:TI 52))
(clobber (reg:TI XMM6_REG))
(clobber (reg:TI XMM7_REG))
(clobber (reg:TI XMM8_REG))
(clobber (reg:TI XMM9_REG))
(clobber (reg:TI XMM10_REG))
(clobber (reg:TI XMM11_REG))
(clobber (reg:TI XMM12_REG))
(clobber (reg:TI XMM13_REG))
(clobber (reg:TI XMM14_REG))
(clobber (reg:TI XMM15_REG))
(clobber (reg:DI SI_REG))
(clobber (reg:DI DI_REG))]
"!SIBLING_CALL_P (insn) && TARGET_64BIT"
......@@ -21505,16 +21521,16 @@
(call (mem:QI (match_operand:DI 1 "constant_call_address_operand" ""))
(match_operand:DI 2 "const_int_operand" "")))
(unspec [(const_int 0)] UNSPEC_MS_TO_SYSV_CALL)
(clobber (reg:TI 27))
(clobber (reg:TI 28))
(clobber (reg:TI 45))
(clobber (reg:TI 46))
(clobber (reg:TI 47))
(clobber (reg:TI 48))
(clobber (reg:TI 49))
(clobber (reg:TI 50))
(clobber (reg:TI 51))
(clobber (reg:TI 52))
(clobber (reg:TI XMM6_REG))
(clobber (reg:TI XMM7_REG))
(clobber (reg:TI XMM8_REG))
(clobber (reg:TI XMM9_REG))
(clobber (reg:TI XMM10_REG))
(clobber (reg:TI XMM11_REG))
(clobber (reg:TI XMM12_REG))
(clobber (reg:TI XMM13_REG))
(clobber (reg:TI XMM14_REG))
(clobber (reg:TI XMM15_REG))
(clobber (reg:DI SI_REG))
(clobber (reg:DI DI_REG))]
"!SIBLING_CALL_P (insn) && TARGET_64BIT"
......
gcc/config/i386/mmx.md
......@@ -1583,22 +1583,22 @@
(define_insn "mmx_emms"
[(unspec_volatile [(const_int 0)] UNSPECV_EMMS)
(clobber (reg:XF 8))
(clobber (reg:XF 9))
(clobber (reg:XF 10))
(clobber (reg:XF 11))
(clobber (reg:XF 12))
(clobber (reg:XF 13))
(clobber (reg:XF 14))
(clobber (reg:XF 15))
(clobber (reg:DI 29))
(clobber (reg:DI 30))
(clobber (reg:DI 31))
(clobber (reg:DI 32))
(clobber (reg:DI 33))
(clobber (reg:DI 34))
(clobber (reg:DI 35))
(clobber (reg:DI 36))]
(clobber (reg:XF ST0_REG))
(clobber (reg:XF ST1_REG))
(clobber (reg:XF ST2_REG))
(clobber (reg:XF ST3_REG))
(clobber (reg:XF ST4_REG))
(clobber (reg:XF ST5_REG))
(clobber (reg:XF ST6_REG))
(clobber (reg:XF ST7_REG))
(clobber (reg:DI MM0_REG))
(clobber (reg:DI MM1_REG))
(clobber (reg:DI MM2_REG))
(clobber (reg:DI MM3_REG))
(clobber (reg:DI MM4_REG))
(clobber (reg:DI MM5_REG))
(clobber (reg:DI MM6_REG))
(clobber (reg:DI MM7_REG))]
"TARGET_MMX"
"emms"
[(set_attr "type" "mmx")
......@@ -1606,22 +1606,22 @@
(define_insn "mmx_femms"
[(unspec_volatile [(const_int 0)] UNSPECV_FEMMS)
(clobber (reg:XF 8))
(clobber (reg:XF 9))
(clobber (reg:XF 10))
(clobber (reg:XF 11))
(clobber (reg:XF 12))
(clobber (reg:XF 13))
(clobber (reg:XF 14))
(clobber (reg:XF 15))
(clobber (reg:DI 29))
(clobber (reg:DI 30))
(clobber (reg:DI 31))
(clobber (reg:DI 32))
(clobber (reg:DI 33))
(clobber (reg:DI 34))
(clobber (reg:DI 35))
(clobber (reg:DI 36))]
(clobber (reg:XF ST0_REG))
(clobber (reg:XF ST1_REG))
(clobber (reg:XF ST2_REG))
(clobber (reg:XF ST3_REG))
(clobber (reg:XF ST4_REG))
(clobber (reg:XF ST5_REG))
(clobber (reg:XF ST6_REG))
(clobber (reg:XF ST7_REG))
(clobber (reg:DI MM0_REG))
(clobber (reg:DI MM1_REG))
(clobber (reg:DI MM2_REG))
(clobber (reg:DI MM3_REG))
(clobber (reg:DI MM4_REG))
(clobber (reg:DI MM5_REG))
(clobber (reg:DI MM6_REG))
(clobber (reg:DI MM7_REG))]
"TARGET_3DNOW"
"femms"
[(set_attr "type" "mmx")
......
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