Skip to content

R
riscv-gcc-1
Commit 776749c5 by Mark Mitchell Committed by Mark Mitchell
Options

genix.h: Remove. 

	* config/ns32k/genix.h: Remove.
	* config/ns32k/x-genix: Likewise.
	* config/ns32k/xm-genix.h: Likewise.
	* config/fx80: Remove all filee in directory.
	* config/pyr: Likewise.
	* config/tahoe: Likewise.
	* config/gmicro: Likewise.
	* config/spur: Likewise.
	* configure.in: Remove configury bits for above targets.
	* configure: Regenerated.

From-SVN: r36691
parent a7b4171a
Showing with 11 additions and 776 deletions
gcc/ChangeLog
2000-10-01 Mark Mitchell <mark@codesourcery.com>
* config/ns32k/genix.h: Remove.
* config/ns32k/x-genix: Likewise.
* config/ns32k/xm-genix.h: Likewise.
* config/fx80: Remove all filee in directory.
* config/pyr: Likewise.
* config/tahoe: Likewise.
* config/gmicro: Likewise.
* config/spur: Likewise.
* configure.in: Remove configury bits for above targets.
* configure: Regenerated.
* configure.in: Don't configure chill by default.
* configure: Regenerated.
......
gcc/config/fx80/fx80.c deleted 100644 → 0
/* Subroutines for insn-output.c for Alliant FX computers.
Copyright (C) 1989, 1991, 1997, 1998, 1999 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* Some output-actions in alliant.md need these. */
#include "config.h"
#include "system.h"
#include "rtl.h"
#include "regs.h"
#include "hard-reg-set.h"
#include "real.h"
#include "insn-config.h"
#include "conditions.h"
#include "insn-flags.h"
#include "function.h"
#include "output.h"
#include "insn-attr.h"
/* Index into this array by (register number >> 3) to find the
smallest class which contains that register. */
enum reg_class regno_reg_class[]
= { DATA_REGS, ADDR_REGS, FP_REGS };
static rtx find_addr_reg ();
char *
output_btst (operands, countop, dataop, insn, signpos)
rtx *operands;
rtx countop, dataop;
rtx insn;
int signpos;
{
operands[0] = countop;
operands[1] = dataop;
if (GET_CODE (countop) == CONST_INT)
{
register int count = INTVAL (countop);
/* If COUNT is bigger than size of storage unit in use,
advance to the containing unit of same size. */
if (count > signpos)
{
int offset = (count & ~signpos) / 8;
count = count & signpos;
operands[1] = dataop = adj_offsettable_operand (dataop, offset);
}
if (count == signpos)
cc_status.flags = CC_NOT_POSITIVE | CC_Z_IN_NOT_N;
else
cc_status.flags = CC_NOT_NEGATIVE | CC_Z_IN_NOT_N;
/* These three statements used to use next_insns_test_no...
but it appears that this should do the same job. */
if (count == 31
&& next_insn_tests_no_inequality (insn))
return "tst%.l %1";
if (count == 15
&& next_insn_tests_no_inequality (insn))
return "tst%.w %1";
if (count == 7
&& next_insn_tests_no_inequality (insn))
return "tst%.b %1";
cc_status.flags = CC_NOT_NEGATIVE;
}
return "btst %0,%1";
}
/* Return the best assembler insn template
for moving operands[1] into operands[0] as a fullword. */
static char *
singlemove_string (operands)
rtx *operands;
{
if (operands[1] != const0_rtx)
return "mov%.l %1,%0";
if (! ADDRESS_REG_P (operands[0]))
return "clr%.l %0";
return "sub%.l %0,%0";
}
/* Output assembler code to perform a doubleword move insn
with operands OPERANDS. */
char *
output_move_double (operands)
rtx *operands;
{
enum { REGOP, OFFSOP, MEMOP, PUSHOP, POPOP, CNSTOP, RNDOP } optype0, optype1;
rtx latehalf[2];
rtx addreg0 = 0, addreg1 = 0;
/* First classify both operands. */
if (REG_P (operands[0]))
optype0 = REGOP;
else if (offsettable_memref_p (operands[0]))
optype0 = OFFSOP;
else if (GET_CODE (XEXP (operands[0], 0)) == POST_INC)
optype0 = POPOP;
else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC)
optype0 = PUSHOP;
else if (GET_CODE (operands[0]) == MEM)
optype0 = MEMOP;
else
optype0 = RNDOP;
if (REG_P (operands[1]))
optype1 = REGOP;
else if (CONSTANT_P (operands[1]))
optype1 = CNSTOP;
else if (offsettable_memref_p (operands[1]))
optype1 = OFFSOP;
else if (GET_CODE (XEXP (operands[1], 0)) == POST_INC)
optype1 = POPOP;
else if (GET_CODE (XEXP (operands[1], 0)) == PRE_DEC)
optype1 = PUSHOP;
else if (GET_CODE (operands[1]) == MEM)
optype1 = MEMOP;
else
optype1 = RNDOP;
/* Check for the cases that the operand constraints are not
supposed to allow to happen. Abort if we get one,
because generating code for these cases is painful. */
if (optype0 == RNDOP || optype1 == RNDOP)
abort ();
/* If one operand is decrementing and one is incrementing
decrement the former register explicitly
and change that operand into ordinary indexing. */
if (optype0 == PUSHOP && optype1 == POPOP)
{
operands[0] = XEXP (XEXP (operands[0], 0), 0);
output_asm_insn ("subq%.l %#8,%0", operands);
operands[0] = gen_rtx_MEM (DImode, operands[0]);
optype0 = OFFSOP;
}
if (optype0 == POPOP && optype1 == PUSHOP)
{
operands[1] = XEXP (XEXP (operands[1], 0), 0);
output_asm_insn ("subq%.l %#8,%1", operands);
operands[1] = gen_rtx_MEM (DImode, operands[1]);
optype1 = OFFSOP;
}
/* If an operand is an unoffsettable memory ref, find a register
we can increment temporarily to make it refer to the second word. */
if (optype0 == MEMOP)
addreg0 = find_addr_reg (XEXP (operands[0], 0));
if (optype1 == MEMOP)
addreg1 = find_addr_reg (XEXP (operands[1], 0));
/* Ok, we can do one word at a time.
Normally we do the low-numbered word first,
but if either operand is autodecrementing then we
do the high-numbered word first.
In either case, set up in LATEHALF the operands to use
for the high-numbered word and in some cases alter the
operands in OPERANDS to be suitable for the low-numbered word. */
if (optype0 == REGOP)
latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else if (optype0 == OFFSOP)
latehalf[0] = adj_offsettable_operand (operands[0], 4);
else
latehalf[0] = operands[0];
if (optype1 == REGOP)
latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else if (optype1 == OFFSOP)
latehalf[1] = adj_offsettable_operand (operands[1], 4);
else if (optype1 == CNSTOP)
{
if (GET_CODE (operands[1]) == CONST_DOUBLE)
split_double (operands[1], &operands[1], &latehalf[1]);
else if (CONSTANT_P (operands[1]))
{
latehalf[1] = operands[1];
operands[1] = const0_rtx;
}
}
else
latehalf[1] = operands[1];
/* If insn is effectively movd N(sp),-(sp) then we will do the
high word first. We should use the adjusted operand 1 (which is N+4(sp))
for the low word as well, to compensate for the first decrement of sp. */
if (optype0 == PUSHOP
&& REGNO (XEXP (XEXP (operands[0], 0), 0)) == STACK_POINTER_REGNUM
&& reg_overlap_mentioned_p (stack_pointer_rtx, operands[1]))
operands[1] = latehalf[1];
/* If one or both operands autodecrementing,
do the two words, high-numbered first. */
/* Likewise, the first move would clobber the source of the second one,
do them in the other order. This happens only for registers;
such overlap can't happen in memory unless the user explicitly
sets it up, and that is an undefined circumstance. */
if (optype0 == PUSHOP || optype1 == PUSHOP
|| (optype0 == REGOP && optype1 == REGOP
&& REGNO (operands[0]) == REGNO (latehalf[1])))
{
/* Make any unoffsettable addresses point at high-numbered word. */
if (addreg0)
output_asm_insn ("addql %#4,%0", &addreg0);
if (addreg1)
output_asm_insn ("addql %#4,%0", &addreg1);
/* Do that word. */
output_asm_insn (singlemove_string (latehalf), latehalf);
/* Undo the adds we just did. */
if (addreg0)
output_asm_insn ("subql %#4,%0", &addreg0);
if (addreg1)
output_asm_insn ("subql %#4,%0", &addreg1);
/* Do low-numbered word. */
return singlemove_string (operands);
}
/* Normal case: do the two words, low-numbered first. */
output_asm_insn (singlemove_string (operands), operands);
/* Make any unoffsettable addresses point at high-numbered word. */
if (addreg0)
output_asm_insn ("addql %#4,%0", &addreg0);
if (addreg1)
output_asm_insn ("addql %#4,%0", &addreg1);
/* Do that word. */
output_asm_insn (singlemove_string (latehalf), latehalf);
/* Undo the adds we just did. */
if (addreg0)
output_asm_insn ("subql %#4,%0", &addreg0);
if (addreg1)
output_asm_insn ("subql %#4,%0", &addreg1);
return "";
}
/* Return a REG that occurs in ADDR with coefficient 1.
ADDR can be effectively incremented by incrementing REG. */
static rtx
find_addr_reg (addr)
rtx addr;
{
while (GET_CODE (addr) == PLUS)
{
if (GET_CODE (XEXP (addr, 0)) == REG)
addr = XEXP (addr, 0);
else if (GET_CODE (XEXP (addr, 1)) == REG)
addr = XEXP (addr, 1);
else if (CONSTANT_P (XEXP (addr, 0)))
addr = XEXP (addr, 1);
else if (CONSTANT_P (XEXP (addr, 1)))
addr = XEXP (addr, 0);
else
abort ();
}
if (GET_CODE (addr) == REG)
return addr;
abort ();
}
int
standard_SunFPA_constant_p (x)
rtx x;
{
return( 0 );
}
gcc/config/fx80/xm-fx80.h deleted 100644 → 0
/* Configuration for GNU C-compiler for Alliant FX computers.
Copyright (C) 1989, 1993 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* #defines that need visibility everywhere. */
#define FALSE 0
#define TRUE 1
/* This describes the machine the compiler is hosted on. */
#define HOST_BITS_PER_CHAR 8
#define HOST_BITS_PER_SHORT 16
#define HOST_BITS_PER_INT 32
#define HOST_BITS_PER_LONG 32
#define HOST_BITS_PER_LONGLONG 64
/* target machine dependencies.
tm.h is a symbolic link to the actual target specific file. */
#include "tm.h"
/* Arguments to use with `exit'. */
#define SUCCESS_EXIT_CODE 0
#define FATAL_EXIT_CODE 33
gcc/config/ns32k/genix.h deleted 100644 → 0
/* Definitions of target machine for GNU compiler. Genix ns32000 version.
Copyright (C) 1987, 1988, 1994 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "ns32k/encore.h"
/* We don't want the one Encore needs. */
#undef ASM_SPEC
/* The following defines override ones in ns32k.h and prevent any attempts
to explicitly or implicitly make references to the SB register in the GCC
generated code. It is necessary to avoid such references under Genix V.3.1
because this OS doesn't even save/restore the SB on context switches! */
#define IS_OK_REG_FOR_BASE_P(X) \
( (GET_CODE (X) == REG) && REG_OK_FOR_BASE_P (X) )
#undef INDIRECTABLE_1_ADDRESS_P
#define INDIRECTABLE_1_ADDRESS_P(X) \
(CONSTANT_ADDRESS_NO_LABEL_P (X) \
|| IS_OK_REG_FOR_BASE_P (X) \
|| (GET_CODE (X) == PLUS \
&& IS_OK_REG_FOR_BASE_P (XEXP (X, 0)) \
&& CONSTANT_ADDRESS_P (XEXP (X, 1)) ) )
/* Note that for double indirects, only FP, SP, and SB are allowed
as the inner-most base register. But we are avoiding use of SB. */
#undef MEM_REG
#define MEM_REG(X) \
( (GET_CODE (X) == REG) \
&& ( (REGNO (X) == FRAME_POINTER_REGNUM) \
|| (REGNO (X) == STACK_POINTER_REGNUM) ) )
#undef INDIRECTABLE_2_ADDRESS_P
#define INDIRECTABLE_2_ADDRESS_P(X) \
(GET_CODE (X) == MEM \
&& (((xfoo0 = XEXP (X, 0), MEM_REG (xfoo0)) \
|| (GET_CODE (xfoo0) == PLUS \
&& MEM_REG (XEXP (xfoo0, 0)) \
&& CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfoo0, 1)))) \
|| CONSTANT_ADDRESS_NO_LABEL_P (xfoo0)))
/* Go to ADDR if X is a valid address not using indexing.
(This much is the easy part.) */
#undef GO_IF_NONINDEXED_ADDRESS
#define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
{ register rtx xfoob = (X); \
if (GET_CODE (xfoob) == REG) goto ADDR; \
if (INDIRECTABLE_1_ADDRESS_P(X)) goto ADDR; \
if (CONSTANT_P(X)) goto ADDR; \
if (INDIRECTABLE_2_ADDRESS_P (X)) goto ADDR; \
if (GET_CODE (X) == PLUS) \
if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (X, 1))) \
if (INDIRECTABLE_2_ADDRESS_P (XEXP (X, 0))) \
goto ADDR; \
}
/* A bug in the GNX 3.X assembler causes references to external symbols to
be mishandled if the symbol is also used as the name of a function-local
variable or as the name of a struct or union field. The problem only
appears when you are also using the -g option so that SDB debugging
directives are also being produced by GCC. In such cases, the assembler
gets the external entity confused with the local entity and addressing
havoc ensues. The solution is to get GCC to produce .global directives
for all external entities which are actually referenced within the current
source file. The following macro does this. */
#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
ASM_GLOBALIZE_LABEL(FILE,NAME);
/* Genix wants 0l instead of 0f. */
#undef ASM_OUTPUT_DOUBLE
#define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
fprintf (FILE, "\t.long 0l%.20e\n", (VALUE))
/* A bug in the GNX 3.X linker prevents symbol-table entries with a storage-
class field of C_EFCN (-1) from being accepted. */
#ifdef PUT_SDB_EPILOGUE_END
#undef PUT_SDB_EPILOGUE_END
#endif
#define PUT_SDB_EPILOGUE_END(NAME)
#undef TARGET_VERSION
#define TARGET_VERSION fprintf (stderr, " (32000, National syntax)");
/* Same as the encore definition except
* Different syntax for double constants.
* Don't output `?' before external regs.
* Output `(sb)' in certain indirect refs. */
#error this has not been updated since version 1.
#error it is certainly wrong.
#undef PRINT_OPERAND
#define PRINT_OPERAND(FILE, X, CODE) \
{ if (CODE == '$') putc ('$', FILE); \
else if (CODE == '?'); \
else if (GET_CODE (X) == REG) \
fprintf (FILE, "%s", reg_names[REGNO (X)]); \
else if (GET_CODE (X) == MEM) \
{ \
rtx xfoo; \
xfoo = XEXP (X, 0); \
switch (GET_CODE (xfoo)) \
{ \
case MEM: \
if (GET_CODE (XEXP (xfoo, 0)) == REG) \
if (REGNO (XEXP (xfoo, 0)) == STACK_POINTER_REGNUM) \
fprintf (FILE, "0(0(sp))"); \
else fprintf (FILE, "0(0(%s))", \
reg_names[REGNO (XEXP (xfoo, 0))]); \
else \
{ \
extern int paren_base_reg_printed; \
fprintf (FILE, "0("); \
paren_base_reg_printed = 0; \
output_address (xfoo); \
if (!paren_base_reg_printed) \
fprintf (FILE, "(sb)"); \
putc (')', FILE); \
} \
break; \
case REG: \
fprintf (FILE, "0(%s)", reg_names[REGNO (xfoo)]); \
break; \
case PRE_DEC: \
case POST_INC: \
fprintf (FILE, "tos"); \
break; \
case CONST_INT: \
fprintf (FILE, "@%d", INTVAL (xfoo)); \
break; \
default: \
output_address (xfoo); \
break; \
} \
} \
else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode) \
if (GET_MODE (X) == DFmode) \
{ union { double d; int i[2]; } u; \
u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \
fprintf (FILE, "$0l%.20e", u.d); } \
else { union { double d; int i[2]; } u; \
u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \
fprintf (FILE, "$0f%.20e", u.d); } \
else if (GET_CODE (X) == CONST) \
output_addr_const (FILE, X); \
else { putc ('$', FILE); output_addr_const (FILE, X); }}
gcc/config/ns32k/x-genix deleted 100644 → 0
# Makefile modifications for compilation on Genix.
ALLOCA=alloca.o
MALLOC = malloc.o
# You must get malloc.c and getpagesize.h from GNU Emacs.
gcc/config/ns32k/xm-genix.h deleted 100644 → 0
/* Config file for ns32k running system V. */
#define memcpy(src,dst,len) bcopy ((dst),(src),(len))
#define memset gcc_memset
#define memcmp(left,right,len) bcmp ((left),(right),(len))
#define USG
gcc/config/pyr/x-pyr deleted 100644 → 0
CLIB=-lc /usr/.attlib/libPW.a
gcc/config/pyr/xm-pyr.h deleted 100644 → 0
/* Configuration for GNU compiler, for Pyramid 90x, 9000, and MIServer Series.
Copyright (C) 1989, 1993 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* #defines that need visibility everywhere. */
#define FALSE 0
#define TRUE 1
/* target machine dependencies.
tm.h is a symbolic link to the actual target specific file. */
#include "tm.h"
/* This describes the machine the compiler is hosted on. */
#define HOST_BITS_PER_CHAR 8
#define HOST_BITS_PER_SHORT 16
#define HOST_BITS_PER_INT 32
#define HOST_BITS_PER_LONG 32
#define HOST_BITS_PER_LONGLONG 64
#define HOST_WORDS_BIG_ENDIAN
/* Arguments to use with `exit'. */
#define SUCCESS_EXIT_CODE 0
#define FATAL_EXIT_CODE 33
gcc/config/spur/xm-spur.h deleted 100644 → 0
/* Configuration for GNU C-compiler for Berkeley SPUR processor.
Copyright (C) 1988, 1993 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* #defines that need visibility everywhere. */
#define FALSE 0
#define TRUE 1
/* This describes the machine the compiler is hosted on. */
#define HOST_BITS_PER_CHAR 8
#define HOST_BITS_PER_SHORT 16
#define HOST_BITS_PER_INT 32
#define HOST_BITS_PER_LONG 32
#define HOST_BITS_PER_LONGLONG 64
/* target machine dependencies.
tm.h is a symbolic link to the actual target specific file. */
#include "tm.h"
/* Arguments to use with `exit'. */
#define SUCCESS_EXIT_CODE 0
#define FATAL_EXIT_CODE 33
gcc/config/tahoe/harris.h deleted 100644 → 0
/* Definitions of target machine for GNU compiler. Harris tahoe version.
Copyright (C) 1989, 1993 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "tahoe/tahoe.h"
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-Dtahoe -Dunix -Dhcx -Asystem(unix) -Acpu(tahoe) -Amachine(tahoe)"
#undef DBX_DEBUGGING_INFO
#define SDB_DEBUGGING_INFO
#undef LIB_SPEC
#undef TARGET_DEFAULT
#define TARGET_DEFAULT 1
/* urem and udiv don't exist on this system. */
#undef UDIVSI3_LIBCALL
#undef UMODSI3_LIBCALL
/* Operand of .align is not logarithmic. */
#undef ASM_OUTPUT_ALIGN
#define ASM_OUTPUT_ALIGN(FILE,LOG) \
LOG ? fprintf (FILE, "\t.align %d\n", 1 << (LOG)) : 0
/* For the same reason, we need .align 2 after casesi. */
#undef PRINT_OPERAND
#define PRINT_OPERAND(FILE, X, CODE) \
{ if (CODE == '@') \
putc ('2', FILE); \
else if (GET_CODE (X) == REG) \
fprintf (FILE, "%s", reg_names[REGNO (X)]); \
else if (GET_CODE (X) == MEM) \
output_address (XEXP (X, 0)); \
else { putc ('$', FILE); output_addr_const (FILE, X); }}
#undef ASM_OUTPUT_LOCAL
#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
( fputs (".bss ", (FILE)), \
assemble_name ((FILE), (NAME)), \
fprintf ((FILE), ",%u,4\n", (ROUNDED)))
/* Output at beginning of assembler file. */
/* The .file command should always begin the output. */
#undef ASM_FILE_START
#define ASM_FILE_START(FILE) \
output_file_directive ((FILE), main_input_filename);
#define ASM_OUTPUT_ASCII(FILE, PTR, SIZE) \
do { \
const unsigned char *_p = (PTR); \
int _thissize = (SIZE); \
fprintf ((FILE), "\t.ascii \""); \
for (i = 0; i < _thissize; i++) \
{ \
register int c = _p[i]; \
if (c >= ' ' && c < 0177 && c != '\"' && c != '\\') \
putc (c, (FILE)); \
else \
{ \
fprintf ((FILE), "\\%o", c); \
if (i < _thissize - 1 \
&& _p[i + 1] >= '0' && _p[i + 1] <= '9') \
fprintf ((FILE), "\"\n\t.ascii \""); \
} \
} \
fprintf ((FILE), "\"\n"); \
} while (0)
gcc/config/tahoe/xm-tahoe.h deleted 100644 → 0
/* Configuration for GNU C-compiler for Tahoe.
Copyright (C) 1987, 1993 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/*
* File: xm-tahoe.h
*
* Original port made at the University of Buffalo by Devon Bowen,
* Dale Wiles and Kevin Zachmann.
*
* Changes for HCX by Piet van Oostrum,
* University of Utrecht, The Netherlands (piet@cs.ruu.nl)
*
* Mail bugs reports or fixes to: gcc@cs.buffalo.edu
*/
/* This file has the same stuff the vax version does */
/* defines that need visibility everywhere */
#define FALSE 0
#define TRUE 1
/* target machine dependencies
tm.h is a symbolic link to the actual target specific file. */
#include "tm.h"
/* This describes the machine the compiler is hosted on. */
#define HOST_BITS_PER_CHAR 8
#define HOST_BITS_PER_SHORT 16
#define HOST_BITS_PER_INT 32
#define HOST_BITS_PER_LONG 32
#define HOST_BITS_PER_LONGLONG 64
#define HOST_WORDS_BIG_ENDIAN
/* Arguments to use with `exit'. */
#define SUCCESS_EXIT_CODE 0
#define FATAL_EXIT_CODE 33
gcc/configure.in
......@@ -1031,9 +1031,6 @@ changequote([,])dnl
tmake_file=fr30/t-fr30
extra_parts="crti.o crtn.o crtbegin.o crtend.o"
;;
# This hasn't been upgraded to GCC 2.
# fx80-alliant-*) # Alliant FX/80
# ;;
h8300-*-*)
float_format=i32
;;
......@@ -3112,13 +3109,6 @@ changequote([,])dnl
tm_file=ns32k/tek6200.h
use_collect2=yes
;;
# This has not been updated to GCC 2.
# ns32k-ns-genix*)
# xm_defines=USG
# xmake_file=ns32k/x-genix
# tm_file=ns32k/genix.h
# use_collect2=yes
# ;;
ns32k-merlin-*)
tm_file=ns32k/merlin.h
use_collect2=yes
......@@ -3150,13 +3140,6 @@ changequote([,])dnl
ns32k-*-openbsd*)
# Nothing special
;;
# This has not been updated to GCC 2.
# pyramid-*-*)
# cpu_type=pyr
# xmake_file=pyr/x-pyr
# use_collect2=yes
# ;;
pj*-linux*)
tm_file="svr4.h pj/linux.h ${tm_file}"
;;
......@@ -3659,24 +3642,12 @@ changequote([,])dnl
fi
float_format=sparc
;;
# This hasn't been upgraded to GCC 2.
# tahoe-harris-*) # Harris tahoe, using COFF.
# tm_file=tahoe/harris.h
# ;;
# tahoe-*-bsd*) # tahoe running BSD
# ;;
thumb*-*-*)
AC_MSG_ERROR([
*** The Thumb targets have been depreciated. The equivalent
*** ARM based toolchain can now generated Thumb instructions
*** when the -mthumb switch is given to the compiler.])
;;
# This hasn't been upgraded to GCC 2.
# tron-*-*)
# cpu_type=gmicro
# use_collect2=yes
# ;;
v850-*-rtems*)
cpu_type=v850
tm_file="v850/rtems.h"
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment