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riscv-gcc-1
Commit 77612f06 by Tom Wood
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Constraint fixes from Torbjorn. 

From-SVN: r1582
parent 3915de94
Showing with 18 additions and 18 deletions
gcc/config/m88k/m88k.md
......@@ -28,7 +28,7 @@
(define_expand "m88k_sccs_id"
[(match_operand:SI 0 "" "")]
""
"{ static char sccs_id[] = \"@(#)m88k.md 2.2.6.5 01 Jul 1992 18:47:08\";
"{ static char sccs_id[] = \"@(#)m88k.md 2.2.6.6 13 Jul 1992 09:43:57\";
FAIL; }")
;; Attribute specifications
......@@ -1433,14 +1433,14 @@
[(set_attr "type" "branch")])
(define_insn "locate1"
[(set (match_operand:SI 0 "register_operand" "r")
[(set (match_operand:SI 0 "register_operand" "=r")
(high:SI (unspec:SI [(label_ref (match_operand 1 "" ""))] 0)))]
""
"or.u %0,%#r0,%#hi16(%1#abdiff)")
(define_insn "locate2"
[(parallel [(set (reg:SI 1) (pc))
(set (match_operand:SI 0 "register_operand" "r")
(set (match_operand:SI 0 "register_operand" "=r")
(lo_sum:SI (match_dup 0)
(unspec:SI
[(label_ref (match_operand 1 "" ""))] 0)))])]
......@@ -1771,11 +1771,11 @@
;; operand 5 is the register to hold the value (r4 or r5)
(define_expand "call_block_move"
[(set (reg:SI 3) (minus:SI (match_operand:SI 2 "register_operand" "r")
(match_operand:SI 3 "immediate_operand" "i")))
(set (match_operand 5 "register_operand" "r")
(match_operand 4 "memory_operand" "m"))
(set (reg:SI 2) (minus:SI (match_operand:SI 1 "register_operand" "r")
[(set (reg:SI 3) (minus:SI (match_operand:SI 2 "register_operand" "")
(match_operand:SI 3 "immediate_operand" "")))
(set (match_operand 5 "register_operand" "")
(match_operand 4 "memory_operand" ""))
(set (reg:SI 2) (minus:SI (match_operand:SI 1 "register_operand" "")
(match_dup 3)))
(use (reg:SI 2))
(use (reg:SI 3))
......@@ -1791,13 +1791,13 @@
;; operand 6 is the loop count
(define_expand "call_block_move_loop"
[(set (reg:SI 3) (minus:SI (match_operand:SI 2 "register_operand" "r")
(match_operand:SI 3 "immediate_operand" "i")))
(set (match_operand:SI 5 "register_operand" "r")
(match_operand:SI 4 "memory_operand" "m"))
(set (reg:SI 2) (minus:SI (match_operand:SI 1 "register_operand" "r")
[(set (reg:SI 3) (minus:SI (match_operand:SI 2 "register_operand" "")
(match_operand:SI 3 "immediate_operand" "")))
(set (match_operand:SI 5 "register_operand" "")
(match_operand:SI 4 "memory_operand" ""))
(set (reg:SI 2) (minus:SI (match_operand:SI 1 "register_operand" "")
(match_dup 3)))
(set (reg:SI 6) (match_operand:SI 6 "immediate_operand" "i"))
(set (reg:SI 6) (match_operand:SI 6 "immediate_operand" ""))
(use (reg:SI 2))
(use (reg:SI 3))
(use (match_dup 5))
......@@ -2164,7 +2164,7 @@
;; Add with carry insns.
(define_insn ""
[(parallel [(set (match_operand:SI 0 "reg_or_0_operand" "r")
[(parallel [(set (match_operand:SI 0 "reg_or_0_operand" "=r")
(plus:SI (match_operand:SI 1 "reg_or_0_operand" "rO")
(match_operand:SI 2 "reg_or_0_operand" "rO")))
(set (reg:CC 0)
......@@ -2180,7 +2180,7 @@
"addu.co %#r0,%r0,%r1")
(define_insn ""
[(set (match_operand:SI 0 "reg_or_0_operand" "r")
[(set (match_operand:SI 0 "reg_or_0_operand" "=r")
(plus:SI (match_operand:SI 1 "reg_or_0_operand" "rO")
(unspec:SI [(match_operand:SI 2 "reg_or_0_operand" "rO")
(reg:CC 0)] 0)))]
......@@ -2284,7 +2284,7 @@
;; Subtract with carry insns.
(define_insn ""
[(parallel [(set (match_operand:SI 0 "reg_or_0_operand" "r")
[(parallel [(set (match_operand:SI 0 "reg_or_0_operand" "=r")
(minus:SI (match_operand:SI 1 "reg_or_0_operand" "rO")
(match_operand:SI 2 "reg_or_0_operand" "rO")))
(set (reg:CC 0)
......@@ -2300,7 +2300,7 @@
"subu.co %#r0,%r0,%r1")
(define_insn ""
[(set (match_operand:SI 0 "reg_or_0_operand" "r")
[(set (match_operand:SI 0 "reg_or_0_operand" "=r")
(minus:SI (match_operand:SI 1 "reg_or_0_operand" "rO")
(unspec:SI [(match_operand:SI 2 "reg_or_0_operand" "rO")
(reg:CC 0)] 1)))]
......
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